Logic Circuit Design

Selected Methods

  • Shimon P. Vingron

Table of contents

  1. Front Matter
    Pages i-xiv
  2. Combinational Circuits

    1. Front Matter
      Pages 1-1
    2. Shimon P. Vingron
      Pages 3-12
    3. Shimon P. Vingron
      Pages 13-25
    4. Shimon P. Vingron
      Pages 27-40
    5. Shimon P. Vingron
      Pages 41-49
    6. Shimon P. Vingron
      Pages 51-66
    7. Shimon P. Vingron
      Pages 67-74
    8. Shimon P. Vingron
      Pages 75-84
    9. Shimon P. Vingron
      Pages 85-95
  3. Latches

    1. Front Matter
      Pages 97-97
    2. Shimon P. Vingron
      Pages 99-109
    3. Shimon P. Vingron
      Pages 111-123
    4. Shimon P. Vingron
      Pages 125-140
    5. Shimon P. Vingron
      Pages 141-154
  4. Asynchronous Circuits

    1. Front Matter
      Pages 155-156
    2. Shimon P. Vingron
      Pages 157-168
    3. Shimon P. Vingron
      Pages 169-185
    4. Shimon P. Vingron
      Pages 187-202
    5. Shimon P. Vingron
      Pages 203-216

About this book


    In three main divisions the  book covers combinational circuits, latches, and asynchronous sequential circuits. Combinational circuits have  no memorising ability, while sequential circuits have such an ability to various degrees. Latches are the simplest sequential circuits, ones with the shortest memory. The presentation is decidedly non-standard.
    The design of combinational circuits is discussed in an orthodox manner using normal forms and in an unorthodox manner using set-theoretical evaluation formulas relying heavily on Karnaugh maps. The latter approach allows for a new design technique called composition.
     Latches are covered very extensively. Their memory functions are expressed mathematically in a time-independent manner allowing the use of (normal, non-temporal) Boolean logic in their calculation. The theory of latches is then used as the basis for calculating asynchronous circuits.
    Asynchronous circuits are specified in a tree-representation, each internal node of the tree representing an internal latch of the circuit, the latches specified by the tree itself. The tree specification allows solutions of formidable problems such as algorithmic state assignment, finding equivalent states non-recursively, and verifying asynchronous circuits.


Canonical normal forms Karnaugh maps Shegalkin normal forms asynchronous sequential circuits automata theory circuit latches combinational circuits switching theory

Authors and affiliations

  • Shimon P. Vingron
    • 1
  1. 1.HinterbrühlAustria

Bibliographic information

  • DOI https://doi.org/10.1007/978-3-642-27657-6
  • Copyright Information Springer-Verlag Berlin Heidelberg 2012
  • Publisher Name Springer, Berlin, Heidelberg
  • eBook Packages Engineering
  • Print ISBN 978-3-642-27656-9
  • Online ISBN 978-3-642-27657-6
  • About this book