Editors:
Part of the book series: Lecture Notes in Computer Science (LNCS, volume 6760)
Part of the book sub series: Transactions on High-Performance Embedded Architectures and Compilers (THIPEAC)
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Table of contents (21 chapters)
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Front Matter
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Regular Papers
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4th International Conference on High-Performance and Embedded Architectures and Compilers – HiPEAC (Selected Papers)
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Workshop on Software and Hardware Challenges of Many-core Platforms – SHCMP (Selected Papers)
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8th IEEE International Symposium on Systems, Architectures, Modeling and Simulation – SAMOS VIII (Selected Papers)
About this book
Keywords
- chip multiprocessing
- evolutionary multiobjective optimization
- many-core architecture
- network-on-chip
- signal processing
Editors and Affiliations
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Department of Computer Science and Engineering, Chalmers University of Technology, Gothenburg, Sweden
Per Stenström
Bibliographic Information
Book Title: Transactions on High-Performance Embedded Architectures and Compilers IV
Editors: Per Stenström
Series Title: Lecture Notes in Computer Science
DOI: https://doi.org/10.1007/978-3-642-24568-8
Publisher: Springer Berlin, Heidelberg
eBook Packages: Computer Science, Computer Science (R0)
Copyright Information: Springer-Verlag GmbH Berlin Heidelberg 2011
Softcover ISBN: 978-3-642-24567-1Published: 22 November 2011
eBook ISBN: 978-3-642-24568-8Published: 15 November 2011
Series ISSN: 0302-9743
Series E-ISSN: 1611-3349
Edition Number: 1
Number of Pages: XV, 430
Number of Illustrations: 222 b/w illustrations
Topics: Arithmetic and Logic Structures, Processor Architectures, Input/Output and Data Communications, Logic Design, Computer Communication Networks, Compilers and Interpreters