Transactions on High-Performance Embedded Architectures and Compilers IV

  • Per Stenström

Part of the Lecture Notes in Computer Science book series (LNCS, volume 6760)

Table of contents

  1. Front Matter
  2. Regular Papers

    1. Frederik Vandeputte, Lieven Eeckhout
      Pages 21-41
    2. Timothy M. Jones, Michael F. P. O’Boyle, Jaume Abella, Antonio González
      Pages 42-62
  3. 4th International Conference on High-Performance and Embedded Architectures and Compilers – HiPEAC (Selected Papers)

    1. Arnaldo Azevedo, Ben Juurlink, Cor Meenderinck, Andrei Terechko, Jan Hoogerbrugge, Mauricio Alvarez et al.
      Pages 111-134
    2. Sai Prashanth Muralidhara, Mahmut Kandemir
      Pages 135-154
    3. Frederik Vandeputte, Lieven Eeckhout
      Pages 155-174
  4. Workshop on Software and Hardware Challenges of Many-core Platforms – SHCMP (Selected Papers)

    1. Mohammad Ansari, Mikel Luján, Christos Kotselidis, Kim Jarvis, Chris Kirkham, Ian Watson
      Pages 195-214
    2. Yasutaka Wada, Akihiro Hayashi, Takeshi Masuura, Jun Shirako, Hirofumi Nakano, Hiroaki Shikano et al.
      Pages 215-233
    3. Xiongfei Liao, Wu Jigang, Thambipillai Srikanthan
      Pages 234-253
    4. Nan Wu, Qianming Yang, Mei Wen, Yi He, Ju Ren, Maolin Guan et al.
      Pages 274-293
    5. Yuan Nan, Yu Lei, Fan Dong-rui
      Pages 294-310
  5. 8th IEEE International Symposium on Systems, Architectures, Modeling and Simulation – SAMOS VIII (Selected Papers)

    1. Valeriu Beiu, Basheer A. M. Madappuram, Peter M. Kelly, Liam J. McDaid
      Pages 311-333
    2. Daniel Llorente, Kimon Karras, Thomas Wild, Andreas Herkersdorf
      Pages 334-353
    3. W. G. Osborne, W. Luk, J. G. F. Coutinho, O. Mencer
      Pages 354-369
    4. Markus Rullmann, Renate Merker
      Pages 370-390

About this book

Introduction

Transactions on HiPEAC aims at the timely dissemination of research contributions in computer architecture and compilation methods for high-performance embedded computer systems. Recognizing the convergence of embedded and general-purpose computer systems, this journal publishes original research on systems targeted at specific computing tasks as well as systems with broad application bases. The scope of the journal therefore covers all aspects of computer architecture, code generation and compiler optimization methods of interest to researchers and practitioners designing future embedded systems. This 4th issue contains 21 papers carefully reviewed and selected out of numerous submissions and is divided in four sections. The first section contains five regular papers. The second section consists of the top four papers from the 4th International Conference on High-Performance Embedded Architectures and Compilers, HiPEAC 2009, held in Paphos, Cyprus, in January 2009. The third section contains a set of six papers providing a snap-shot from the Workshop on Software and Hardware Challenges of Manycore Platforms, SHCMP 2008 held in Beijing, China, in June 2008. The fourth section consists of six papers from the 8th IEEE International Symposium on Systems, Architectures, Modeling and Simulation, SAMOS VIII (2008) held in Samos, Greece, in July 2008.

Keywords

chip multiprocessing evolutionary multiobjective optimization many-core architecture network-on-chip signal processing

Editors and affiliations

  • Per Stenström
    • 1
  1. 1.Department of Computer Science and EngineeringChalmers University of TechnologyGothenburgSweden

Bibliographic information

  • DOI https://doi.org/10.1007/978-3-642-24568-8
  • Copyright Information Springer-Verlag GmbH Berlin Heidelberg 2011
  • Publisher Name Springer, Berlin, Heidelberg
  • eBook Packages Computer Science
  • Print ISBN 978-3-642-24567-1
  • Online ISBN 978-3-642-24568-8
  • Series Print ISSN 0302-9743
  • Series Online ISSN 1611-3349
  • About this book