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  • Conference proceedings
  • © 2010

Algorithms and Architectures for Parallel Processing

10th International Conference, ICA3PP 2010, Busan, Korea, May 21-23, 2010. Proceedings, Part I

Part of the book series: Lecture Notes in Computer Science (LNCS, volume 6081)

Part of the book sub series: Theoretical Computer Science and General Issues (LNTCS)

Conference series link(s): ICA3PP: International Conference on Algorithms and Architectures for Parallel Processing

Conference proceedings info: ICA3PP 2010.

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Table of contents (49 papers)

  1. Front Matter

  2. Keynote Papers

    1. Efficient Web Browsing with Perfect Anonymity Using Page Prefetching

      • Shui Yu, Theerasak Thapngam, Su Wei, Wanlei Zhou
      Pages 1-12
  3. Parallel Algorithms

    1. Scalable Co-clustering Algorithms

      • Bongjune Kwon, Hyuk Cho
      Pages 32-43
    2. Parallel Prefix Computation in the Recursive Dual-Net

      • Yamin Li, Shietung Peng, Wanming Chu
      Pages 54-64
    3. A Two-Phase Differential Synchronization Algorithm for Remote Files

      • Yonghong Sheng, Dan Xu, Dongsheng Wang
      Pages 65-78
    4. A New Parallel Method of Smith-Waterman Algorithm on a Heterogeneous Platform

      • Bo Chen, Yun Xu, Jiaoyun Yang, Haitao Jiang
      Pages 79-90
    5. A New Hybrid Parallel Algorithm for MrBayes

      • Jianfu Zhou, Gang Wang, Xiaoguang Liu
      Pages 102-112
    6. Research and Design of Deployment Framework for Blade-Based Data Center

      • Haiping Qu, Xiuwen Wang, Lu Xu, Jiangang Zhang, Xiaoming Han
      Pages 113-123
  4. Parallel Architectures

    1. Function Units Sharing between Neighbor Cores in CMP

      • Tianzhou Chen, Jianliang Ma, Hui Yuan, Jingwei Liu, Guanjun Jiang
      Pages 136-148
    2. A High Efficient On-Chip Interconnection Network in SIMD CMPs

      • Dan Wu, Kui Dai, Xuecheng Zou, Jinli Rao, Pan Chen
      Pages 149-162
    3. Network-on-Chip Routing Algorithms by Breaking Cycles

      • Minghua Tang, Xiaola Lin
      Pages 163-173
    4. A Fair Thread-Aware Memory Scheduling Algorithm for Chip Multiprocessor

      • Danfeng Zhu, Rui Wang, Hui Wang, Depei Qian, Zhongzhi Luan, Tianshu Chu
      Pages 174-185
    5. Formal Proof for a General Architecture of Hybrid Prefix/Carry-Select Adders

      • Feng Liu, Qingping Tan, Xiaoyu Song, Gang Chen
      Pages 193-204
    6. An Efficient Non-blocking Multithreaded Embedded System

      • Joseph M. Arul, Tsung-Yun Chen, Guan-Jie Hwang, Hua-Yuan Chung, Fu-Jiun Lin, You-Jen Lee
      Pages 205-214
    7. A Remote Mirroring Architecture with Adaptively Cooperative Pipelining

      • Yongzhi Song, Zhenhai Zhao, Bing Liu, Tingting Qin, Gang Wang, Xiaoguang Liu
      Pages 215-225

Other Volumes

  1. Algorithms and Architectures for Parallel Processing

    10th International Conference, ICA3PP 2010, Busan, Korea, May 21-23, 2010. Proceedings. Part I
  2. Algorithms and Architectures for Parallel Processing

    10th International Conference, ICA3PP 2010, Busan, Korea, May 21-23, 2010. Workshops, Part II

About this book

It is our great pleasure to welcome you to the proceedings of the 10th annual event of the International Conference on Algorithms and Architectures for Parallel Processing (ICA3PP). ICA3PP is recognized as the main regular event covering the many dimensions of parallel algorithms and architectures, encompassing fundamental theoretical - proaches, practical experimental projects, and commercial components and systems. As applications of computing systems have permeated every aspect of daily life, the power of computing systems has become increasingly critical. Therefore, ICA3PP 2010 aimed to permit researchers and practitioners from industry to exchange inf- mation regarding advancements in the state of the art and practice of IT-driven s- vices and applications, as well as to identify emerging research topics and define the future directions of parallel processing. We received a total of 157 submissions this year, showing by both quantity and quality that ICA3PP is a premier conference on parallel processing. In the first stage, all papers submitted were screened for their relevance and general submission - quirements. These manuscripts then underwent a rigorous peer-review process with at least three reviewers per paper. In the end, 47 papers were accepted for presentation and included in the main proceedings, comprising a 30% acceptance rate.

Keywords

  • Multithreading
  • Scala
  • Scheduling
  • Scheme
  • algorithms
  • ant algorithm
  • broadcasting
  • genetic algorithms
  • image processing
  • multi-core
  • ontologies
  • p2p systems
  • parallel programming
  • simulated annealing
  • stochastic programming
  • algorithm analysis and problem complexity

Editors and Affiliations

  • Department of Computer Science and Information Engineering, Chung Hua University, Hsinchu, Taiwan, China

    Ching-Hsien Hsu

  • Department of Computer Science, St. Francis Xavier University, Antigonish, Canada

    Laurence T. Yang

  • Department of Computer Science ad Engineering, Seoul National University of Technology, Seoul, Korea

    Jong Hyuk Park

  • Division of Computer Engineering, Mokwon University, Daejeon, Korea

    Sang-Soo Yeo

Bibliographic Information

Buying options

eBook USD 109.00
Price excludes VAT (USA)
  • ISBN: 978-3-642-13119-6
  • Instant PDF download
  • Readable on all devices
  • Own it forever
  • Exclusive offer for individuals only
  • Tax calculation will be finalised during checkout
Softcover Book USD 149.00
Price excludes VAT (USA)