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  • Conference proceedings
  • © 2008

Hardware and Software: Verification and Testing

Third International Haifa Verification Conference, HVC 2007, Haifa, Israel, October 23-25, 2007, Proceedings

Editors:

Part of the book series: Lecture Notes in Computer Science (LNCS, volume 4899)

Part of the book sub series: Programming and Software Engineering (LNPSE)

Conference series link(s): HVC: Haifa Verification Conference

Conference proceedings info: HVC 2007.

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Table of contents (20 papers)

  1. Front Matter

  2. HVC Award

    1. Symbolic Execution and Model Checking for Testing

      • Corina S. Păsăreanu, Willem Visser
      Pages 17-18
  3. Hardware Verification

    1. Reactivity in SystemC Transaction-Level Models

      • Frederic Doucet, R. K. Shyamasundar, Ingolf H. Krüger, Saurabh Joshi, Rajesh K. Gupta
      Pages 34-50
  4. Model Checking

    1. Verifying Parametrised Hardware Designs Via Counter Automata

      • Ales Smrčka, Tomás Vojnar
      Pages 51-68
    2. How Fast and Fat Is Your Probabilistic Model Checker? An Experimental Performance Comparison

      • David N. Jansen, Joost-Pieter Katoen, Marcel Oldenkamp, Mariëlle Stoelinga, Ivan Zapreev
      Pages 69-85
  5. Dynamic Hardware Verification

    1. Using Virtual Coverage to Hit Hard-To-Reach Events

      • Laurent Fournier, Avi Ziv
      Pages 104-119
  6. Merging Formal and Testing

    1. Test Case Generation for Ultimately Periodic Paths

      • Saddek Bensalem, Doron Peled, Hongyang Qu, Stavros Tripakis, Lenore Zuck
      Pages 120-135
    2. Dynamic Testing Via Automata Learning

      • Harald Raffelt, Bernhard Steffen, Tiziana Margaria
      Pages 136-152
  7. Formal Verification for Software

    1. On the Architecture of System Verification Environments

      • Mark A. Hillebrand, Wolfgang J. Paul
      Pages 153-168
    2. Exploiting Shared Structure in Software Verification Conditions

      • Domagoj Babić, Alan J. Hu
      Pages 169-184
    3. A Complete Bounded Model Checking Algorithm for Pushdown Systems

      • Gérard Basler, Daniel Kroening, Georg Weissenbacher
      Pages 202-217
  8. Software Testing

    1. Locating Regression Bugs

      • Dor Nir, Shmuel Tyszberowicz, Amiram Yehudai
      Pages 218-234
    2. The Advantages of Post-Link Code Coverage

      • Orna Raz, Moshe Klausner, Nitzan Peleg, Gad Haber, Eitan Farchi, Shachar Fienblit et al.
      Pages 235-251

Other Volumes

  1. Hardware and Software: Verification and Testing

Keywords

  • SAT-based verification algorithms
  • algorithms
  • automata
  • classification of hardware bugs
  • concurrency tes
  • design for verifiability
  • equivalence checking
  • formal verification
  • formal verification methods
  • high-level stimuli generation
  • model checking
  • semantics
  • simulation-based verification
  • static analysis
  • verification

Bibliographic Information

Buying options

eBook USD 39.99
Price excludes VAT (Canada)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book USD 54.99
Price excludes VAT (Canada)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Learn about institutional subscriptions