Name: Reconfigurable Computing: Architectures, Tools and Applications
ISBN: 978-3-540-71431-6

Editors:

Pedro C. Diniz

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Eduardo Marques

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Koen Bertels

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Marcio Merino Fernandes

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João M. P. Cardoso

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Part of the book series: Lecture Notes in Computer Science (LNCS, volume 4419)

Part of the book sub series: Theoretical Computer Science and General Issues (LNTCS)

Conference series link(s): ARC: International Symposium on Applied Reconfigurable Computing

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225 Citations

Conference proceedings info: ARC 2007.

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Table of contents (38 papers)

Front Matter

PDF
Architectures [Regular Papers]
1. Architectural Exploration of the ADRES Coarse-Grained Reconfigurable Array
  
  Frank Bouwens, Mladen Berekovic, Andreas Kanstein, Georgi Gaydadjiev
  
  Pages 1-13
2. A Configurable Multi-ported Register File Architecture for Soft Processor Cores
  
  Mazen A. R. Saghir, Rawan Naous
  
  Pages 14-25
3. MT-ADRES: Multithreading on Coarse-Grained Reconfigurable Architecture
  
  Kehuai Wu, Andreas Kanstein, Jan Madsen, Mladen Berekovic
  
  Pages 26-38
4. Asynchronous ARM Processor Employing an Adaptive Pipeline Architecture
  
  Je-Hoon Lee, Seung-Sook Lee, Kyoung-Rok Cho
  
  Pages 39-48
5. Partially Reconfigurable Point-to-Point Interconnects in Virtex-II Pro FPGAs
  
  Jae Young Hur, Stephan Wong, Stamatis Vassiliadis
  
  Pages 49-60
6. Systematic Customization of On-Chip Crossbar Interconnects
  
  Jae Young Hur, Todor Stefanov, Stephan Wong, Stamatis Vassiliadis
  
  Pages 61-72
7. Authentication of FPGA Bitstreams: Why and How
  
  Saar Drimer
  
  Pages 73-84
Architectures [Short Papers]
1. Design of a Reversible PLD Architecture
  
  Jae-Jin Lee, Dong-Guk Hwang, Gi-Yong Song
  
  Pages 85-90
2. Designing Heterogeneous FPGAs with Multiple SBs
  
  Kostas Siozios, Stelios Mamagkakis, Dimitrios Soudris, Antonios Thanailakis
  
  Pages 91-96
Mapping Techniques and Tools [Regular Papers]
1. Partial Data Reuse for Windowing Computations: Performance Modeling for FPGA Implementations
  
  Joonseok Park, Pedro C. Diniz
  
  Pages 97-109
2. Optimized Generation of Memory Structure in Compiling Window Operations onto Reconfigurable Hardware
  
  Yazhuo Dong, Yong Dou, Jie Zhou
  
  Pages 110-121
3. Adapting and Automating XILINX’s Partial Reconfiguration Flow for Multiple Module Implementations
  
  Rainer Scholz
  
  Pages 122-129
4. A Linear Complexity Algorithm for the Automatic Generation of Convex Multiple Input Multiple Output Instructions
  
  Carlo Galuzzi, Koen Bertels, Stamatis Vassiliadis
  
  Pages 130-141
5. Evaluating Variable-Grain Logic Cells Using Heterogeneous Technology Mapping
  
  Kazunori Matsuyama, Motoki Amagasaki, Hideaki Nakayama, Ryoichi Yamaguchi, Masahiro Iida, Toshinori Sueyoshi
  
  Pages 142-154
6. The Implementation of a Coarse-Grained Reconfigurable Architecture with Loop Self-pipelining
  
  Yong Dou, Jinhui Xu, Guiming Wu
  
  Pages 155-166
7. Hardware/Software Codesign for Embedded Implementation of Neural Networks
  
  Cesar Torres-Huitzil, Bernard Girau, Adrien Gauffriau
  
  Pages 167-178
8. Synthesis of Regular Expressions Targeting FPGAs: Current Status and Open Issues
  
  João Bispo, Ioannis Sourdis, João M. P. Cardoso, Stamatis Vassiliadis
  
  Pages 179-190
Mapping Techniques and Tools [Short Papers]
1. About the Importance of Operation Grouping Procedures for Multiple Word-Length Architecture Optimizations
  
  Nicolas Hervé, Daniel Ménard, Olivier Sentieys
  
  Pages 191-200
Arithmetic [Regular Papers]
1. Switching Activity Models for Power Estimation in FPGA Multipliers
  
  Ruzica Jevtic, Carlos Carreras, Gabriel Caffarena
  
  Pages 201-213

Other Volumes

Reconfigurable Computing: Architectures, Tools and Applications

Keywords

Bibliographic Information

Book Title: Reconfigurable Computing: Architectures, Tools and Applications
Book Subtitle: Third International Workshop, ARC 2007, Mangaratiba, Brazil, March 27-29, 2007, Proceedings
Editors: Pedro C. Diniz, Eduardo Marques, Koen Bertels, Marcio Merino Fernandes, João M. P. Cardoso
Series Title: Lecture Notes in Computer Science
DOI: https://doi.org/10.1007/978-3-540-71431-6
Publisher: Springer Berlin, Heidelberg
eBook Packages: Computer Science, Computer Science (R0)
Copyright Information: Springer-Verlag Berlin Heidelberg 2007
Softcover ISBN: 978-3-540-71430-9Published: 19 March 2007
eBook ISBN: 978-3-540-71431-6Published: 04 June 2007
Series ISSN: 0302-9743
Series E-ISSN: 1611-3349
Edition Number: 1
Number of Pages: XIV, 394
Topics: Theory of Computation, Computer Hardware, Processor Architectures, Computer Communication Networks, System Performance and Evaluation, Computer System Implementation

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Table of contents (38 papers)

Front Matter

Architectures [Regular Papers]

Architectures [Short Papers]

Mapping Techniques and Tools [Regular Papers]

Mapping Techniques and Tools [Short Papers]

Arithmetic [Regular Papers]

Other Volumes

Reconfigurable Computing: Architectures, Tools and Applications

Keywords

Bibliographic Information

Publish with us

Buy it now

Buying options

Other ways to access

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