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System Level Design from HW/SW to Memory for Embedded Systems

5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, Foz do Iguaçu, Brazil, November 3–6, 2015, Proceedings

  • Marcelo Götz
  • Gunar Schirner
  • Marco Aurélio Wehrmeister
  • Mohammad Abdullah Al Faruque
  • Achim Rettberg
Conference proceedings IESS 2015

Part of the IFIP Advances in Information and Communication Technology book series (IFIPAICT, volume 523)

Table of contents

  1. Front Matter
    Pages I-XII
  2. Cyber-Physical Systems

    1. Front Matter
      Pages 1-1
    2. Maurício Fontana de Vargas, Carlos Eduardo Pereira
      Pages 3-14
    3. Alexander Jungmann, Jan Jatzkowski, Bernd Kleinjohann
      Pages 27-37
    4. Luis Feliphe Silva Costa, Alisson V. Brito, Tiago P. Nascimento, Thiago Henrique Menezes Bezerra
      Pages 38-47
  3. System-Level Design

    1. Front Matter
      Pages 49-49
    2. Marcus Mikulcak, Paula Herber, Thomas Göthel, Sabine Glesner
      Pages 64-76
    3. Gregor Nitsche, Ralph Görgen, Kim Grüttner, Wolfgang Nebel
      Pages 77-87
    4. Tayfun Gezgin, Björn Koopmann, Achim Rettberg
      Pages 88-99
  4. Multi/Many-Core System Design

    1. Front Matter
      Pages 101-101
    2. Jan Jatzkowski, Marcio Kreutz, Achim Rettberg
      Pages 103-115
    3. Andrés Goens, Jeronimo Castrillon
      Pages 116-127
    4. Ran Hao, Nasibeh Teimouri, Kasra Moazzemi, Gunar Schirner
      Pages 128-141
  5. Memory System Design

    1. Front Matter
      Pages 143-143
    2. Majid Sabbagh, Hamed Tabkhi, Gunar Schirner
      Pages 145-158
    3. Paulo C. Santos, Marco A. Z. Alves, Luigi Carro
      Pages 159-171
    4. Gustavo Girão, Flávio Rech Wagner
      Pages 172-182
  6. Embedded HW/SW Design and Applications

    1. Front Matter
      Pages 183-183
    2. Malte Falk, Stefan Walter, Achim Rettberg
      Pages 185-196
    3. Kasra Moazzemi, Smit Patel, Shen Feng, Gunar Schirner
      Pages 197-209
    4. Vitor Bandeira, Vivianne L. Costa, Guilherme Bontorin, Ricardo A. L. Reis
      Pages 210-217
    5. Éricles Sousa, Frank Hannig, Jürgen Teich
      Pages 218-229
  7. Back Matter
    Pages 231-231

About these proceedings

Introduction

This book constitutes the refereed proceedings of the 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, held in Foz do Iguaçu, Brazil, in November 2015.

The 18 full revised papers presented were carefully reviewed and selected from 25 submissions. The papers present a broad discussion on the design, analysis and verification of embedded and cyber-physical systems including design methodologies, verification, performance analysis, and real-time systems design. They are organized in the following topical sections: cyber-physical systems, system-level design; multi/many-core system design; memory system design; and embedded HW/SW design and applications.


Keywords

applied computing bandwidth computer architecture cyber-physical systems embedded systems Field Programmable Gate Array (FPGA) image processing microprocessor chips many-core systems model checking multicore systems semantics software engineering specifications verification

Editors and affiliations

  • Marcelo Götz
    • 1
  • Gunar Schirner
    • 2
  • Marco Aurélio Wehrmeister
    • 3
  • Mohammad Abdullah Al Faruque
    • 4
  • Achim Rettberg
    • 5
  1. 1.Federal University of Rio Grande do SulPorto AlegreBrazil
  2. 2.Northeastern University BostonBostonUSA
  3. 3.Federal University of Technology ParanaCuritibaBrazil
  4. 4.University of California at IrvineIrvineUSA
  5. 5.Carl von Ossietzky UniversityOldenburgGermany

Bibliographic information

  • DOI https://doi.org/10.1007/978-3-319-90023-0
  • Copyright Information IFIP International Federation for Information Processing 2017
  • Publisher Name Springer, Cham
  • eBook Packages Computer Science
  • Print ISBN 978-3-319-90022-3
  • Online ISBN 978-3-319-90023-0
  • Series Print ISSN 1868-4238
  • Series Online ISSN 1868-422X
  • Buy this book on publisher's site