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  • Conference proceedings
  • © 2021

Automated Technology for Verification and Analysis

19th International Symposium, ATVA 2021, Gold Coast, QLD, Australia, October 18–22, 2021, Proceedings

Part of the book series: Lecture Notes in Computer Science (LNCS, volume 12971)

Part of the book sub series: Programming and Software Engineering (LNPSE)

Conference series link(s): ATVA: International Symposium on Automated Technology for Verification and Analysis

Conference proceedings info: ATVA 2021.

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  • ISBN: 978-3-030-88885-5
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Table of contents (24 papers)

  1. Front Matter

    Pages i-xv
  2. Invited Paper

    1. Front Matter

      Pages 1-1
    2. Linear Temporal Logic – From Infinite to Finite Horizon

      • Lucas M. Tabajara, Moshe Y. Vardi
      Pages 3-12
  3. Automata Theory

    1. Front Matter

      Pages 13-13
    2. Determinization and Limit-Determinization of Emerson-Lei Automata

      • Tobias John, Simon Jantsch, Christel Baier, Sascha Klüppelholz
      Pages 15-31
    3. Automatic Discovery of Fair Paths in Infinite-State Transition Systems

      • Alessandro Cimatti, Alberto Griggio, Enrico Magnago
      Pages 32-47
    4. Certifying DFA Bounds for Recognition and Separation

      • Orna Kupferman, Nir Lavee, Salomon Sickert
      Pages 48-64
  4. Machine Learning for Formal Methods

    1. Front Matter

      Pages 65-65
    2. AALpy: An Active Automata Learning Library

      • Edi Muškardin, Bernhard K. Aichernig, Ingo Pill, Andrea Pferscher, Martin Tappler
      Pages 67-73
    3. Learning Linear Temporal Properties from Noisy Data: A MaxSAT-Based Approach

      • Jean-Raphaël Gaglione, Daniel Neider, Rajarshi Roy, Ufuk Topcu, Zhe Xu
      Pages 74-90
    4. Mining Interpretable Spatio-Temporal Logic Properties for Spatially Distributed Systems

      • Sara Mohammadinejad, Jyotirmoy V. Deshmukh, Laura Nenzi
      Pages 91-107
  5. Theorem Proving and Tools

    1. Front Matter

      Pages 109-109
    2. A Formal Semantics of the GraalVM Intermediate Representation

      • Brae J. Webb, Mark Utting, Ian J. Hayes
      Pages 111-126
    3. A Verified Decision Procedure for Orders in Isabelle/HOL

      • Lukas Stevens, Tobias Nipkow
      Pages 127-143
    4. PJBDD: A BDD Library for Java and Multi-Threading

      • Dirk Beyer, Karlheinz Friedberger, Stephan Holzner
      Pages 144-149
  6. Model Checking

    1. Front Matter

      Pages 151-151
    2. Live Synthesis

      • Bernd Finkbeiner, Felix Klein, Niklas Metzger
      Pages 153-169
    3. Faster Pushdown Reachability Analysis with Applications in Network Verification

      • Peter Gjøl Jensen, Stefan Schmid, Morten Konggaard Schou, Jiří Srba, Juan Vanerio, Ingo van Duijn
      Pages 170-186
    4. Verifying Verified Code

      • Siddharth Priya, Xiang Zhou, Yusen Su, Yakir Vizel, Yuyan Bao, Arie Gurfinkel
      Pages 187-202
  7. Probabilistic Analysis

    1. Front Matter

      Pages 203-203

Other Volumes

  1. Automated Technology for Verification and Analysis

    19th International Symposium, ATVA 2021, Gold Coast, QLD, Australia, October 18–22, 2021, Proceedings

About this book

This book constitutes the refereed proceedings of the 19th International Symposium on Automated Technology for Verification and Analysis, ATVA 2021, held in Gold Coast, Australia in October 2021. The symposium is dedicated to promoting research in theoretical and practical aspects of automated analysis, verification and synthesis by providing an international venue for the researchers to present new results. The 19 regular papers presented together with 4 tool papers and 1 invited paper were carefully reviewed and selected from 75 submissions.

The papers are divided into the following topical sub-headings: Automata Theory; Machine learning for Formal Methods; Theorem Proving and Tools; Model Checking; Probabilistic Analysis; Software and Hardware Verification; System Synthesis and Approximation; and Verification of Machine Learning.

Keywords

  • architecture verification and validation
  • artificial intelligence
  • automata theory
  • computer hardware
  • computer networks
  • computer systems
  • embedded systems
  • field programmable gate array
  • formal languages
  • formal logic
  • FPGA
  • model checking
  • network protocols
  • signal processing
  • software architecture
  • software design
  • software engineering
  • theoretical computer science

Editors and Affiliations

  • Griffith University, Brisbane, Australia

    Zhe Hou

  • University of Waterloo, Waterloo, Canada

    Vijay Ganesh

Bibliographic Information

Buying options

eBook USD 59.99
Price excludes VAT (USA)
  • ISBN: 978-3-030-88885-5
  • Instant PDF download
  • Readable on all devices
  • Own it forever
  • Exclusive offer for individuals only
  • Tax calculation will be finalised during checkout
Softcover Book USD 79.99
Price excludes VAT (USA)