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Applied Reconfigurable Computing. Architectures, Tools, and Applications

16th International Symposium, ARC 2020, Toledo, Spain, April 1–3, 2020, Proceedings

  • Conference proceedings
  • © 2020

Overview

Editors:
  1. Fernando Rincón

    1. Technology and Information Systems, University of Castilla-La Mancha, Ciudad Real, Spain

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  2. Jesús Barba

    1. Technology and Information Systems, University of Castilla-La Mancha, Ciudad Real, Spain

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  3. Hayden K. H. So

    1. Department of Electrical and Electronic Engineering, University of Hong Kong, Hong Kong, China

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  4. Pedro Diniz

    1. INESC-ID, Lisbon, Portugal

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  5. Julián Caba

    1. Technology and Information Systems, University of Castilla-La Mancha, Ciudad Real, Spain

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Part of the book series: Lecture Notes in Computer Science (LNCS, volume 12083)

Part of the book sub series: Theoretical Computer Science and General Issues (LNTCS)

Included in the following conference series:

Conference proceedings info: ARC 2020.

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Table of contents (30 papers)

  1. Front Matter

    Pages i-xiii
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  2. Design Methods and Tools

    1. Front Matter

      Pages 1-1
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    2. Improving Performance Estimation for FPGA-Based Accelerators for Convolutional Neural Networks

      • Martin Ferianc, Hongxiang Fan, Ringo S. W. Chu, Jakub Stano, Wayne Luk
      Pages 3-13

    3. Judiciously Spreading Approximation Among Arithmetic Components with Top-Down Inexact Hardware Design

      • Giovanni Ansaloni, Ilaria Scarabottolo, Laura Pozzi
      Pages 14-29

    4. Optimising Operator Sets for Analytical Database Processing on FPGAs

      • Anna Drewes, Jan Moritz Joseph, Bala Gurumurthy, David Broneske, Gunter Saake, Thilo Pionteck
      Pages 30-44

    5. Automated Toolchain for Enhanced Productivity in Reconfigurable Multi-accelerator Systems

      • Alberto Ortiz, Rafael Zamacola, Alfonso Rodríguez, Andrés Otero, Eduardo de la Torre
      Pages 45-60

    6. Chisel Usecase: Designing General Matrix Multiply for FPGA

      • Bruno Ferres, Olivier Muller, Frédéric Rousseau
      Pages 61-72

    7. Cycle-Accurate Debugging of Embedded Designs Using Recurrent Neural Networks

      • Habib ul Hasan Khan, Ariel Podlubne, Gökhan Akgün, Diana Göhringer
      Pages 73-83

    8. Soft-Error Analysis of Self-reconfiguration Controllers for Safety Critical Dynamically Reconfigurable FPGAs

      • Ludovica Bozzoli, Luca Sterpone
      Pages 84-96

    9. SysIDLib: A High-Level Synthesis FPGA Library for Online System Identification

      • Gökhan Akgün, Habib ul Hasan Khan, Marawan Hebaish, Mahmoud Elshimy, Mohamed A. Abd El Ghany, Diana Göhringer
      Pages 97-107

    10. Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices

      • Zakarya Guettatfi, Paul Kaufmann, Marco Platzner
      Pages 108-117

  3. Design Space Exploration and Estimation Techniques

    1. Front Matter

      Pages 119-119
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    2. Accuracy, Training Time and Hardware Efficiency Trade-Offs for Quantized Neural Networks on FPGAs

      • Pascal Bacchus, Robert Stewart, Ekaterina Komendantskaya
      Pages 121-135

    3. Accelerating a Classic 3D Video Game on Heterogeneous Reconfigurable MPSoCs

      • Leonardo Suriano, David Lima, Eduardo de la Torre
      Pages 136-150

    4. Cross-layer CNN Approximations for Hardware Implementation

      • Karim M. A. Ali, Ihsen Alouani, Abdessamad Ait El Cadi, Hamza Ouarnoughi, Smail Niar
      Pages 151-165

    5. Technique for Vendor and Device Agnostic Hardware Area-Time Estimation

      • Deshya Wijesundera, Kushagra Shah, Kisaru Liyanage, Alok Prakash, Thambipillai Srikanthan, Thilina Perera
      Pages 166-177

    6. Resource Efficient Dynamic Voltage and Frequency Scaling on Xilinx FPGAs

      • Gökhan Akgün, Lester Kalms, Diana Göhringer
      Pages 178-192

    7. RISC-V Based MPSoC Design Exploration for FPGAs: Area, Power and Performance

      • Muhammad Ali, Pedram Amini Rad, Diana Göhringer
      Pages 193-207

  4. High-Level Synthesis

    1. Front Matter

      Pages 209-209
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    2. A Modular Software Library for Effective High Level Synthesis of Convolutional Neural Networks

      • Hector Gerardo Munoz Hernandez, Safdar Mahmood, Marcelo Brandalero, Michael Hübner
      Pages 211-220
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  1. Applied Reconfigurable Computing. Architectures, Tools, and Applications

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About this book

This book constitutes the proceedings of the 16th International Symposium on Applied Reconfigurable Computing, ARC 2020, held in Toledo, Spain, in April 2020.

The 18 full papers and 11 poster presentations presented in this volume were carefully reviewed and selected from 40 submissions. The papers are organized in the following topical sections: design methods & tools; design space exploration & estimation techniques; high-level synthesis; architectures; applications. 

Editors and Affiliations

  • Technology and Information Systems, University of Castilla-La Mancha, Ciudad Real, Spain

    Fernando Rincón, Jesús Barba, Julián Caba

  • Department of Electrical and Electronic Engineering, University of Hong Kong, Hong Kong, China

    Hayden K. H. So

  • INESC-ID, Lisbon, Portugal

    Pedro Diniz

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