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© 2019

Automated Methods in Cryptographic Fault Analysis

  • Jakub Breier
  • Xiaolu Hou
  • Shivam Bhasin
Book

Table of contents

  1. Front Matter
    Pages i-xxi
    PDF
  2. Introduction to Fault Analysis in Cryptography
    Jakub Breier, Xiaolu Hou
    Pages 1-10

  3. Automated Fault Analysis of Symmetric Block Ciphers

    1. Front Matter
      Pages 11-11
      PDF
    2. ExpFault: An Automated Framework for Block Cipher Fault Analysis
      Sayandeep Saha, Debdeep Mukhopadhyay, Pallab Dasgupta
      Pages 13-57
    3. Exploitable Fault Space Characterization: A Complementary Approach
      Sayandeep Saha, Dirmanto Jap, Sikhar Patranabis, Debdeep Mukhopadhyay, Shivam Bhasin, Pallab Dasgupta
      Pages 59-88
    4. Differential Fault Analysis Automation on Assembly Code
      Jakub Breier, Xiaolu Hou, Yang Liu
      Pages 89-119
    5. An Automated Framework for Analysis and Evaluation of Algebraic Fault Attacks on Lightweight Block Ciphers
      Fan Zhang, Bolin Yang, Shize Guo, Xinjie Zhao, Tao Wang, Francois-Xavier Standaert et al.
      Pages 121-150
    6. Automatic Construction of Fault Attacks on Cryptographic Hardware Implementations
      Ilia Polian, Mael Gay, Tobias Paxian, Matthias Sauer, Bernd Becker
      Pages 151-170

  4. Automated Design and Deployment of Fault Countermeasures

    1. Front Matter
      Pages 171-171
      PDF
    2. Automated Deployment of Software Encoding Countermeasure
      Jakub Breier, Xiaolu Hou
      Pages 173-194
    3. Idempotent Instructions to Counter Fault Analysis Attacks
      Sikhar Patranabis, Debdeep Mukhopadhyay
      Pages 195-208
    4. Differential Fault Attack Resistant Hardware Design Automation
      Mustafa Khairallah, Jakub Breier, Shivam Bhasin, Anupam Chattopadhyay
      Pages 209-219

  5. Automated Analysis of Fault Countermeasures

    1. Front Matter
      Pages 221-221
      PDF
    2. Automated Evaluation of Software Encoding Schemes
      Jakub Breier, Dirmanto Jap, Shivam Bhasin
      Pages 223-245
    3. Automated Evaluation of Concurrent Error Detection Code Protected Hardware Implementations
      Dirmanto Jap, Jakub Breier, Shivam Bhasin, Anupam Chattopadhyay
      Pages 247-262
    4. Fault Analysis Assisted by Simulation
      Kais Chibani, Adrien Facon, Sylvain Guilley, Damien Marion, Yves Mathieu, Laurent Sauvage et al.
      Pages 263-277

  6. Automated Fault Attack Experiments

    1. Front Matter
      Pages 279-279
      PDF
    2. Optimizing Electromagnetic Fault Injection with Genetic Algorithms
      Antun Maldini, Niels Samwel, Stjepan Picek, Lejla Batina
      Pages 281-300
    3. Automated Profiling Method for Laser Fault Injection in FPGAs
      Jakub Breier, Wei He, Shivam Bhasin, Dirmanto Jap, Samuel Chef, Hock Guan Ong et al.
      Pages 301-325
  7. Back Matter
    Pages 327-334
    PDF

About this book

Introduction

This book presents a collection of automated methods that are useful for different aspects of fault analysis in cryptography. The first part focuses on automated analysis of symmetric cipher design specifications, software implementations, and hardware circuits. The second part provides automated deployment of countermeasures. The third part provides automated evaluation of countermeasures against fault attacks.  Finally, the fourth part focuses on automating fault attack experiments. The presented methods enable software developers, circuit designers, and cryptographers to test and harden their products. 

  • Offers a complete perspective on protecting block ciphers against fault attacks – from analysis to deployment;
  • Provides automated methods for each stage, supported by evaluation and case studies;
  • Describes current fault analysis approaches, together with countermeasures;
  • Includes detailed description of prototypes for each automation method that can be easily implemented and put into industrial applications.

Keywords

Fault Analysis in Cryptography Hardware Security Fault Tolerant Architectures for Cryptography cipher design specifications Cipher Design Level Countermeasures

Editors and affiliations

  • Jakub Breier
    • 1
  • Xiaolu Hou
    • 2
  • Shivam Bhasin
    • 3
  1. 1.Underwriters LaboratoriesSingaporeSingapore
  2. 2.AcronisSingaporeSingapore
  3. 3.Temasek LaboratoriesNanyang Technological UniversitySingaporeSingapore

About the editors

Jakub Breier currently works as a Senior Cryptography Security Analyst at Underwriters Laboratories, Singapore since 2018, focusing on security evaluation of payment schemes. He finished his PhD in Applied Informatics from Slovak University of Technology in 2013. Before his current role, he worked as a Senior Research Scientist at Physical Analysis and Cryptographic Engineering laboratory at Nanyang Technological University, Singapore between 2013-2018. His main interests include physical attacks on cryptographic circuits, more specifically fault and side-channel attacks with emphasis on automated methods for fault analysis. His research has been published at major venues in computer/hardware security and cryptography.

 Xiaolu Hou works as a Secure Computing Researcher at Acronis, Singapore since 2018, in the field of secure multi-party computation. She finished her PhD in Mathematics from Nanyang Technological University (NTU) in 2017. During her PhD studies, she was half year with Singapore University of Technology and Design, where she was doing research in location privacy. After her PhD she joined Cyber Security Laboratory, School of Computer Science and Engineering, NTU, as a Research Fellow. Her research focuses on fault injection and side-channel attacks. With a wide range of research interests, she has published her work at top venues within various fields.

 Shivam Bhasin is a Senior Research Scientist and Principal Investigator at Physical Analysis and Cryptographic Engineering group, Temasek Laboratories, Nanyang Technological University, Singapore since 2015. His research interests include embedded security, trusted computing and secure designs. He received his PhD from Telecom Paristech in 2011, Master’s from Mines Saint-Etienne, France in 2008 and Bachelor’s from UP Tech, India in 2007. Before NTU, Shivam held position of Research Engineer in Institut Mines-Telecom, France. He was also a visiting researcher at UCL, Belgium (2011) and Kobe University, Japan (2013). He regularly publishes at top peer reviewed journals and conferences. Some of his research now also forms a part of ISO/IEC 17825 standard

Bibliographic information