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Architecture and CAD for Deep-Submicron FPGAS

  • Vaughn Betz
  • Jonathan Rose
  • Alexander Marquardt

Table of contents

  1. Front Matter
    Pages i-xi
  2. Vaughn Betz, Jonathan Rose, Alexander Marquardt
    Pages 1-9
  3. Vaughn Betz, Jonathan Rose, Alexander Marquardt
    Pages 11-35
  4. Vaughn Betz, Jonathan Rose, Alexander Marquardt
    Pages 37-61
  5. Vaughn Betz, Jonathan Rose, Alexander Marquardt
    Pages 63-103
  6. Vaughn Betz, Jonathan Rose, Alexander Marquardt
    Pages 105-126
  7. Vaughn Betz, Jonathan Rose, Alexander Marquardt
    Pages 127-149
  8. Vaughn Betz, Jonathan Rose, Alexander Marquardt
    Pages 151-190
  9. Vaughn Betz, Jonathan Rose, Alexander Marquardt
    Pages 191-198
  10. Back Matter
    Pages 199-247

About this book

Introduction

Since their introduction in 1984, Field-Programmable Gate Arrays (FPGAs) have become one of the most popular implementation media for digital circuits and have grown into a $2 billion per year industry. As process geometries have shrunk into the deep-submicron region, the logic capacity of FPGAs has greatly increased, making FPGAs a viable implementation alternative for larger and larger designs. To make the best use of these new deep-submicron processes, one must re-design one's FPGAs and Computer- Aided Design (CAD) tools.
Architecture and CAD for Deep-Submicron FPGAs addresses several key issues in the design of high-performance FPGA architectures and CAD tools, with particular emphasis on issues that are important for FPGAs implemented in deep-submicron processes.
Three factors combine to determine the performance of an FPGA: the quality of the CAD tools used to map circuits into the FPGA, the quality of the FPGA architecture, and the electrical (i.e. transistor-level) design of the FPGA. Architecture and CAD for Deep-Submicron FPGAs examines all three of these issues in concert.
In order to investigate the quality of different FPGA architectures, one needs CAD tools capable of automatically implementing circuits in each FPGA architecture of interest. Once a circuit has been implemented in an FPGA architecture, one next needs accurate area and delay models to evaluate the quality (speed achieved, area required) of the circuit implementation in the FPGA architecture under test. This book therefore has three major foci: the development of a high-quality and highly flexible CAD infrastructure, the creation of accurate area and delay models for FPGAs, and the study of several important FPGA architectural issues.
Architecture and CAD for Deep-Submicron FPGAs is an essential reference for researchers, professionals and students interested in FPGAs.

Keywords

FPGA Field Programmable Gate Array architecture computer computer-aided design (CAD) development gate array geometry logic modeling transistor visualization

Authors and affiliations

  • Vaughn Betz
    • 1
  • Jonathan Rose
    • 1
  • Alexander Marquardt
    • 1
  1. 1.University of TorontoUSA

Bibliographic information

  • DOI https://doi.org/10.1007/978-1-4615-5145-4
  • Copyright Information Kluwer Academic Publishers 1999
  • Publisher Name Springer, Boston, MA
  • eBook Packages Springer Book Archive
  • Print ISBN 978-1-4613-7342-1
  • Online ISBN 978-1-4615-5145-4
  • Series Print ISSN 0893-3405
  • Buy this book on publisher's site