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Logic Synthesis for Field-Programmable Gate Arrays

  • Rajeev Murgai
  • Robert K. Brayton
  • Alberto Sangiovanni-Vincentelli

Table of contents

  1. Front Matter
    Pages i-xvii
  2. Introduction

    1. Front Matter
      Pages 1-1
    2. Rajeev Murgai, Robert K. Brayton, Alberto Sangiovanni-Vincentelli
      Pages 3-17
    3. Rajeev Murgai, Robert K. Brayton, Alberto Sangiovanni-Vincentelli
      Pages 19-47
  3. Look-up Table (LUT) Architectures

    1. Front Matter
      Pages 49-49
    2. Rajeev Murgai, Robert K. Brayton, Alberto Sangiovanni-Vincentelli
      Pages 51-176
    3. Rajeev Murgai, Robert K. Brayton, Alberto Sangiovanni-Vincentelli
      Pages 177-193
    4. Rajeev Murgai, Robert K. Brayton, Alberto Sangiovanni-Vincentelli
      Pages 195-254
    5. Rajeev Murgai, Robert K. Brayton, Alberto Sangiovanni-Vincentelli
      Pages 255-297
    6. Rajeev Murgai, Robert K. Brayton, Alberto Sangiovanni-Vincentelli
      Pages 299-321
  4. Multiplexor-Based Architectures

    1. Front Matter
      Pages 323-323
    2. Rajeev Murgai, Robert K. Brayton, Alberto Sangiovanni-Vincentelli
      Pages 325-395
  5. Conclusions

    1. Front Matter
      Pages 397-397
    2. Rajeev Murgai, Robert K. Brayton, Alberto Sangiovanni-Vincentelli
      Pages 399-407
  6. Back Matter
    Pages 409-427

About this book

Introduction

Short turnaround has become critical in the design of electronic systems. Software- programmable components such as microprocessors and digital signal processors have been used extensively in such systems since they allow rapid design revisions. However, the inherent performance limitations of software-programmable systems mean that they are inadequate for high-performance designs. Designers thus turned to gate arrays as a solution. User-programmable gate arrays (field-programmable gate arrays, FPGAs) have recently emerged and are changing the way electronic systems are designed and implemented. The growing complexity of the logic circuits that can be packed onto an FPGA chip means that it has become important to have automatic synthesis tools that implement logic functions on these architectures. Logic Synthesis for Field-Programmable Gate Arrays describes logic synthesis for both look-up table (LUT) and multiplexor-based architectures, with a balanced presentation of existing techniques together with algorithms and the system developed by the authors.
Audience: A useful reference for VLSI designers, developers of computer-aided design tools, and anyone involved in or with FPGAs.

Keywords

FPGA Field Programmable Gate Array Signal Software VLSI algorithms architecture complexity computer computer-aided design (CAD) digital signal processor gate array logic microprocessor optimization

Authors and affiliations

  • Rajeev Murgai
    • 1
  • Robert K. Brayton
    • 2
  • Alberto Sangiovanni-Vincentelli
    • 2
  1. 1.Fujitsu Laboratories of America, Inc.USA
  2. 2.University of CaliforniaBerkeleyUSA

Bibliographic information

  • DOI https://doi.org/10.1007/978-1-4615-2345-1
  • Copyright Information Kluwer Academic Publishers 1995
  • Publisher Name Springer, Boston, MA
  • eBook Packages Springer Book Archive
  • Print ISBN 978-1-4613-5994-4
  • Online ISBN 978-1-4615-2345-1
  • Series Print ISSN 0893-3405
  • Buy this book on publisher's site