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Digital Timing Macromodeling for VLSI Design Verification

  • Jeong-Taek Kong
  • David Overhauser

Table of contents

  1. Front Matter
    Pages i-xxi
  2. Jeong-Taek Kong, David Overhauser
    Pages 1-13
  3. Jeong-Taek Kong, David Overhauser
    Pages 15-92
  4. Jeong-Taek Kong, David Overhauser
    Pages 93-123
  5. Jeong-Taek Kong, David Overhauser
    Pages 125-169
  6. Jeong-Taek Kong, David Overhauser
    Pages 171-190
  7. Jeong-Taek Kong, David Overhauser
    Pages 191-198
  8. Jeong-Taek Kong, David Overhauser
    Pages 199-203
  9. Back Matter
    Pages 205-265

About this book

Introduction

Digital Timing Macromodeling for VLSI Design Verification first of all provides an extensive history of the development of simulation techniques. It presents detailed discussion of the various techniques implemented in circuit, timing, fast-timing, switch-level timing, switch-level, and gate-level simulation. It also discusses mixed-mode simulation and interconnection analysis methods. The review in Chapter 2 gives an understanding of the advantages and disadvantages of the many techniques applied in modern digital macromodels.
The book also presents a wide variety of techniques for performing nonlinear macromodeling of digital MOS subcircuits which address a large number of shortcomings in existing digital MOS macromodels. Specifically, the techniques address the device model detail, transistor coupling capacitance, effective channel length modulation, series transistor reduction, effective transconductance, input terminal dependence, gate parasitic capacitance, the body effect, the impact of parasitic RC-interconnects, and the effect of transmission gates. The techniques address major sources of errors in existing macromodeling techniques, which must be addressed if macromodeling is to be accepted in commercial CAD tools by chip designers. The techniques presented in Chapters 4-6 can be implemented in other macromodels, and are demonstrated using the macromodel presented in Chapter 3. The new techniques are validated over an extremely wide range of operating conditions: much wider than has been presented for previous macromodels, thus demonstrating the wide range of applicability of these techniques.

Keywords

Modulation VLSI computer-aided design (CAD) design development history integrated circuit interconnect model modeling simulation tables transistor transmission verification

Authors and affiliations

  • Jeong-Taek Kong
    • 1
  • David Overhauser
    • 2
  1. 1.Samsung Electronics Co., Ltd.Korea
  2. 2.Duke UniversityUSA

Bibliographic information

  • DOI https://doi.org/10.1007/978-1-4615-2321-5
  • Copyright Information Kluwer Academic Publishers 1995
  • Publisher Name Springer, Boston, MA
  • eBook Packages Springer Book Archive
  • Print ISBN 978-1-4613-5982-1
  • Online ISBN 978-1-4615-2321-5
  • Series Print ISSN 0893-3405
  • Buy this book on publisher's site