Analog Circuit Design for Process Variation-Resilient Systems-on-a-Chip

This book describes several techniques to address variation-related design challenges for analog blocks in mixed-signal systems-on-chip. The methods presented are results from recent research works involving receiver front-end circuits, baseband filter linearization, and data conversion. These circuit-level techniques are described, with their relationships to emerging system-level calibration approaches, to tune the performances of analog circuits with digital assistance or control. Coverage also includes a strategy to utilize on-chip temperature sensors to measure the signal power and linearity characteristics of analog/RF circuits, as demonstrated by test chip measurements.   

• Describes a variety of variation-tolerant analog circuit design examples, including from RF front-ends, high-performance ADCs and baseband filters;
• Includes built-in testing techniques, linked to current industrial trends;
• Balances digitally-assisted performance tuning with analog performance tuning and mismatch reduction approaches;
• Describes theoretical concepts as well as experimental results for test chips designed with variation-aware techniques.

• Analog performance tuning
• Built-in Testing
• Digitally-assisted performance tuning
• Mismatch Reduction
• On-chip measurement circuits
• System on Chip
• Variation-Tolerant Analog Circuit Design

• , Dept. of Electrical & Computer Engineeri, Northeastern University, Boston, USA

  Marvin Onabajo

• , Dept. of Electrical & Computer Engineeri, Texas A&M University, College Station, USA

  Jose Silva-Martinez

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