Name: High-Performance Computing Using FPGAs
ISBN: 978-1-4614-1791-0

Editors:

Wim Vanderbauwhede⁰,
Khaled Benkrid¹

Wim Vanderbauwhede
1. School of Computing Science, University of Glasgow, Glasgow, UK
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Khaled Benkrid
1. School of Engineering and Electronics, The University of Edinburgh, Edinburgh, UK
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Presents a taxonomy of existing high performance reconfigurable computer architectures
Examines the software tools used in the design and programming of HPRC systems
Discusses the future of HPRC and speculates on the shape of future HPRC systems
Includes supplementary material: sn.pub/extras

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Table of contents (26 chapters)

Front Matter

Pages i-xi

PDF
Applications
1. Front Matter
  
  Pages 1-2
  
  PDF
2. High-Performance Hardware Acceleration of Asset Simulations
  
  Christian de Schryver, Henning Marxen, Stefan Weithoffer, Norbert Wehn
  
  Pages 3-32
3. Monte-Carlo Simulation-Based Financial Computing on the Maxwell FPGA Parallel Machine
  
  Xiang Tian, Khaled Benkrid
  
  Pages 33-80
4. Bioinformatics Applications on the FPGA-Based High-Performance Computer RIVYERA
  
  Lars Wienbrandt
  
  Pages 81-103
5. FPGA-Accelerated Molecular Dynamics
  
  M. A. Khan, M. Chiu, M. C. Herbordt
  
  Pages 105-135
6. FPGA-Based HPRC for Bioinformatics Applications
  
  Yoshiki Yamaguchi, Yasunori Osana, Masato Yoshimi, Hideharu Amano
  
  Pages 137-175
7. High-Performance Computing for Neuroinformatics Using FPGA
  
  Will X. Y. Li, Rosa H. M. Chan, Wei Zhang, Chiwai Yu, Dong Song, Theodore W. Berger et al.
  
  Pages 177-207
8. High-Performance FPGA-Accelerated Real-Time Search
  
  Wim Vanderbauwhede, Sai. R. Chalamalasetti, Martin Margala
  
  Pages 209-244
9. High-Performance Data Processing Over N-ary Trees
  
  Valery Sklyarov, Iouliia Skliarova
  
  Pages 245-277
10. FPGA-Based Systolic Computational-Memory Array for Scalable Stencil Computations
  
  Kentaro Sano
  
  Pages 279-303
11. High Performance Implementation of RTM Seismic Modeling on FPGAs: Architecture, Arithmetic and Power Issues
  
  Victor Medeiros, Abner Barros, Abel Silva-Filho, Manoel E. de Lima
  
  Pages 305-334
12. High-Performance Cryptanalysis on RIVYERA and COPACOBANA Computing Systems
  
  Tim Güneysu, Timo Kasper, Martin Novotný, Christof Paar, Lars Wienbrandt, Ralf Zimmermann
  
  Pages 335-366
13. FPGA-Based HPRC Systems for Scientific Applications
  
  Tsuyoshi Hamada, Yuichiro Shibata
  
  Pages 367-387
14. Accelerating the SPICE Circuit Simulator Using an FPGA: A Case Study
  
  Nachiket Kapre, André DeHon
  
  Pages 389-427
Architectures
1. Front Matter
  
  Pages 429-429
  
  PDF
2. The Convey Hybrid-Core Architecture
  
  Bernd Klauer
  
  Pages 431-451
3. Low Cost High Performance Reconfigurable Computing
  
  Javier Castillo, Jose Luis Bosque, Cesar Pedraza, Emilio Castillo, Pablo Huerta, Jose Ignacio Martinez
  
  Pages 453-479
4. An FPGA-Based Supercomputer for Statistical Physics: The Weird Case of Janus
  
  M. Baity-Jesi, R. A. Baños, A. Cruz, L. A. Fernandez, J. M. Gil-Narvion, A. Gordillo-Guerrero et al.
  
  Pages 481-506
5. Accelerate Communication, not Computation!
  
  Mondrian Nüssle, Holger Fröning, Sven Kapferer, Ulrich Brüning
  
  Pages 507-542

About this book

High-Performance Computing using FPGA covers the area of high performance reconfigurable computing (HPRC). This book provides an overview of architectures, tools and applications for High-Performance Reconfigurable Computing (HPRC). FPGAs offer very high I/O bandwidth and fine-grained, custom and flexible parallelism and with the ever-increasing computational needs coupled with the frequency/power wall, the increasing maturity and capabilities of FPGAs, and the advent of multicore processors which has caused the acceptance of parallel computational models. The Part on architectures will introduce different FPGA-based HPC platforms: attached co-processor HPRC architectures such as the CHREC’s Novo-G and EPCC’s Maxwell systems; tightly coupled HRPC architectures, e.g. the Convey hybrid-core computer; reconfigurably networked HPRC architectures, e.g. the QPACE system, and standalone HPRC architectures such as EPFL’s CONFETTI system. The Part on Tools will focus on high-level programming approaches for HPRC, with chapters on C-to-Gate tools (such as Impulse-C, AutoESL, Handel-C, MORA-C++); Graphical tools (MATLAB-Simulink, NI LabVIEW); Domain-specific languages, languages for heterogeneous computing(for example OpenCL, Microsoft’s Kiwi and Alchemy projects). The part on Applications will present case from several application domains where HPRC has been used successfully, such as Bioinformatics and Computational Biology; Financial Computing; Stencil computations; Information retrieval; Lattice QCD; Astrophysics simulations; Weather and climate modeling.

Keywords

FPGA computing
FPGA configuration
Field-programmable gate array
HPRC architectures
High-Performance Reconfigurable Computing HRPC
High-level FPGA Programming
high speed low latency networking
integrated circuit
programmable logic components
information and communication, circuits

Editors and Affiliations

School of Computing Science, University of Glasgow, Glasgow, UK

Wim Vanderbauwhede
School of Engineering and Electronics, The University of Edinburgh, Edinburgh, UK

Khaled Benkrid

About the editors

Wim Vanderbauwhede is currently a Lecturer at the Department of Computing Science of the University of Glasgow.
Dr. Benkrid is currently a Senior Lecturer at School of Engineering and Electronics at The University of Edinburgh.

Bibliographic Information

Book Title: High-Performance Computing Using FPGAs
Editors: Wim Vanderbauwhede, Khaled Benkrid
DOI: https://doi.org/10.1007/978-1-4614-1791-0
Publisher: Springer New York, NY
eBook Packages: Engineering, Engineering (R0)
Copyright Information: Springer Science+Business Media, LLC 2013
Hardcover ISBN: 978-1-4614-1790-3Published: 02 May 2013
Softcover ISBN: 978-1-4939-4310-4Published: 24 September 2016
eBook ISBN: 978-1-4614-1791-0Published: 23 August 2013
Edition Number: 1
Number of Pages: XI, 803
Number of Illustrations: 188 b/w illustrations, 232 illustrations in colour
Topics: Electronic Circuits and Systems, Processor Architectures, Mathematical Applications in Computer Science

Editors:

Sections

Buying options

Table of contents (26 chapters)

Front Matter

Applications

Front Matter

Architectures

Front Matter

About this book

Keywords

Editors and Affiliations

School of Computing Science, University of Glasgow, Glasgow, UK

School of Engineering and Electronics, The University of Edinburgh, Edinburgh, UK

About the editors

Bibliographic Information

Buying options