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Heterogeneous Multicore Processor Technologies for Embedded Systems

  • Kunio Uchiyama
  • Fumio Arakawa
  • Hironori Kasahara
  • Tohru Nojiri
  • Hideyuki Noda
  • Yasuhiro Tawara
  • Akio Idehara
  • Kenichi Iwata
  • Hiroaki Shikano

Table of contents

  1. Front Matter
    Pages i-xi
  2. Kunio Uchiyama, Fumio Arakawa, Hironori Kasahara, Tohru Nojiri, Hideyuki Noda, Yasuhiro Tawara et al.
    Pages 1-9
  3. Kunio Uchiyama, Fumio Arakawa, Hironori Kasahara, Tohru Nojiri, Hideyuki Noda, Yasuhiro Tawara et al.
    Pages 11-18
  4. Kunio Uchiyama, Fumio Arakawa, Hironori Kasahara, Tohru Nojiri, Hideyuki Noda, Yasuhiro Tawara et al.
    Pages 19-122
  5. Kunio Uchiyama, Fumio Arakawa, Hironori Kasahara, Tohru Nojiri, Hideyuki Noda, Yasuhiro Tawara et al.
    Pages 123-151
  6. Kunio Uchiyama, Fumio Arakawa, Hironori Kasahara, Tohru Nojiri, Hideyuki Noda, Yasuhiro Tawara et al.
    Pages 153-177
  7. Kunio Uchiyama, Fumio Arakawa, Hironori Kasahara, Tohru Nojiri, Hideyuki Noda, Yasuhiro Tawara et al.
    Pages 179-218
  8. Back Matter
    Pages 219-224

About this book

Introduction

To satisfy the higher requirements of digitally converged embedded systems, this book describes heterogeneous multicore technology that uses various kinds of low-power embedded processor cores on a single chip. With this technology, heterogeneous parallelism can be implemented on an SoC, and greater flexibility and superior performance per watt can then be achieved. This book defines the heterogeneous multicore architecture and explains in detail several embedded processor cores including CPU cores and special-purpose processor cores that achieve highly arithmetic-level parallelism. The authors developed three multicore chips (called RP-1, RP-2, and RP-X) according to the defined architecture with the introduced processor cores. The chip implementations, software environments, and applications running on the chips are also explained in the book.

  • Provides readers an overview and practical discussion of heterogeneous multicore technologies from both a hardware and software point of view;
  • Discusses a new, high-performance and energy efficient approach to designing SoCs for digitally converged, embedded systems;
  • Covers hardware issues such as architecture and chip implementation, as well as software issues such as compilers, operating systems, and application programs;
  • Describes three chips developed according to the defined heterogeneous multicore architecture, including chip implementations, software environments, and working applications.

Keywords

Chip Multiprocessors Embedded Systems Heterogeneous Multicore Processors Heterogeneous parallelism Integrated Circuits Microprocessors Multicore Processors Parallel Systems SoC System on Chip

Authors and affiliations

  • Kunio Uchiyama
    • 1
  • Fumio Arakawa
    • 2
  • Hironori Kasahara
    • 3
  • Tohru Nojiri
    • 4
  • Hideyuki Noda
    • 5
  • Yasuhiro Tawara
    • 6
  • Akio Idehara
    • 7
  • Kenichi Iwata
    • 8
  • Hiroaki Shikano
    • 9
  1. 1., Research and Development GroupHitachi, Ltd.,TokyoJapan
  2. 2.Renesas Electronics Corp.TokyoJapan
  3. 3., Green Computing Systems Research and DevWaseda UniversityTokyoJapan
  4. 4.Hitachi, Ltd., Central Research LabTokyoJapan
  5. 5.Renesas Electronics Corp.HyogoJapan
  6. 6.Renesas Electronics Corp.TokyoJapan
  7. 7.Mitsubishi Electric Corp. Nagoya WorksNagoyaJapan
  8. 8.Renesas Electronics Corp.TokyoJapan
  9. 9.Hitachi, Ltd., Central Research Lab.TokyoJapan

Bibliographic information

  • DOI https://doi.org/10.1007/978-1-4614-0284-8
  • Copyright Information Springer Science+Business Media New York 2012
  • Publisher Name Springer, New York, NY
  • eBook Packages Engineering
  • Print ISBN 978-1-4614-0283-1
  • Online ISBN 978-1-4614-0284-8
  • Buy this book on publisher's site