Overview
- Describes efficient procedures for hierarchical top-down design of pipeline converters
- Presents new methodologies to reduce bottom-up iterations, through inherent embedding of transistor-level parameters, such as parasitic capacitances, transconductances, and saturation currents
- Provides mathematical details of behavioral models, includes descriptions of the synthesis methods and associated tools and illustrates models through case studies supported by silicon prototypes
- Includes supplementary material: sn.pub/extras
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Table of contents (7 chapters)
Keywords
About this book
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Bibliographic Information
Book Title: Device-Level Modeling and Synthesis of High-Performance Pipeline ADCs
Authors: Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez
DOI: https://doi.org/10.1007/978-1-4419-8846-1
Publisher: Springer New York, NY
eBook Packages: Engineering, Engineering (R0)
Copyright Information: Springer Science+Business Media, LLC 2011
Hardcover ISBN: 978-1-4419-8845-4
Softcover ISBN: 978-1-4899-9318-2
eBook ISBN: 978-1-4419-8846-1
Edition Number: 1
Number of Pages: XIII, 209
Topics: Circuits and Systems, Signal, Image and Speech Processing, Processor Architectures