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A Parallel Algorithm Synthesis Procedure for High-Performance Computer Architectures

  • Ian N. Dunn
  • Gerard G. L. Meyer

Part of the Series in Computer Science book series (SCS)

Table of contents

  1. Front Matter
    Pages i-xi
  2. Ian N. Dunn, Gerard G. L. Meyer
    Pages 1-3
  3. Ian N. Dunn, Gerard G. L. Meyer
    Pages 5-12
  4. Ian N. Dunn, Gerard G. L. Meyer
    Pages 13-27
  5. Ian N. Dunn, Gerard G. L. Meyer
    Pages 29-40
  6. Ian N. Dunn, Gerard G. L. Meyer
    Pages 41-73
  7. Ian N. Dunn, Gerard G. L. Meyer
    Pages 75-87
  8. Ian N. Dunn, Gerard G. L. Meyer
    Pages 89-99
  9. Ian N. Dunn, Gerard G. L. Meyer
    Pages 101-102
  10. Back Matter
    Pages 103-108

About this book

Introduction

Despite five decades of research, parallel computing remains an exotic, frontier technology on the fringes of mainstream computing. Its much-heralded triumph over sequential computing has yet to materialize. This is in spite of the fact that the processing needs of many signal processing applications continue to eclipse the capabilities of sequential computing. The culprit is largely the software development environment. Fundamental shortcomings in the development environment of many parallel computer architectures thwart the adoption of parallel computing. Foremost, parallel computing has no unifying model to accurately predict the execution time of algorithms on parallel architectures. Cost and scarce programming resources prohibit deploying multiple algorithms and partitioning strategies in an attempt to find the fastest solution. As a consequence, algorithm design is largely an intuitive art form dominated by practitioners who specialize in a particular computer architecture. This, coupled with the fact that parallel computer architectures rarely last more than a couple of years, makes for a complex and challenging design environment.

To navigate this environment, algorithm designers need a road map, a detailed procedure they can use to efficiently develop high performance, portable parallel algorithms. The focus of this book is to draw such a road map. The Parallel Algorithm Synthesis Procedure can be used to design reusable building blocks of adaptable, scalable software modules from which high performance signal processing applications can be constructed. The hallmark of the procedure is a semi-systematic process for introducing parameters to control the partitioning and scheduling of computation and communication. This facilitates the tailoring of software modules to exploit different configurations of multiple processors, multiple floating-point units, and hierarchical memories. To showcase the efficacy of this procedure, the book presents three case studies requiring various degrees of optimization for parallel execution.

Keywords

Scala algorithm design algorithm synthesis algorithms communication computer computer architecture linear optimization optimization parallel computing parallel programming processor programming scheduling signal processing

Authors and affiliations

  • Ian N. Dunn
    • 1
  • Gerard G. L. Meyer
    • 2
  1. 1.Mercury Computer Systems, Inc.ChelmsfordUSA
  2. 2.Johns Hopkins UniversityBaltimoreUSA

Bibliographic information

  • DOI https://doi.org/10.1007/978-1-4419-8650-4
  • Copyright Information Kluwer Academic/Plenum Publishers, New York 2003
  • Publisher Name Springer, Boston, MA
  • eBook Packages Springer Book Archive
  • Print ISBN 978-1-4613-4658-6
  • Online ISBN 978-1-4419-8650-4
  • Series Print ISSN 1567-7974
  • Buy this book on publisher's site