Test and Diagnosis for Small-Delay Defects

  • Mohammad Tehranipoor
  • Ke Peng
  • Krishnendu Chakrabarty

Table of contents

  1. Front Matter
    Pages i-xviii
  2. Mohammad Tehranipoor, Ke Peng, Krishnendu Chakrabarty
    Pages 1-19
  3. Mohammad Tehranipoor, Ke Peng, Krishnendu Chakrabarty
    Pages 21-36
  4. Mohammad Tehranipoor, Ke Peng, Krishnendu Chakrabarty
    Pages 37-60
  5. Mohammad Tehranipoor, Ke Peng, Krishnendu Chakrabarty
    Pages 61-82
  6. Mohammad Tehranipoor, Ke Peng, Krishnendu Chakrabarty
    Pages 83-104
  7. Mohammad Tehranipoor, Ke Peng, Krishnendu Chakrabarty
    Pages 105-118
  8. Mohammad Tehranipoor, Ke Peng, Krishnendu Chakrabarty
    Pages 119-137
  9. Mohammad Tehranipoor, Ke Peng, Krishnendu Chakrabarty
    Pages 139-152
  10. Mohammad Tehranipoor, Ke Peng, Krishnendu Chakrabarty
    Pages 153-173
  11. Mohammad Tehranipoor, Ke Peng, Krishnendu Chakrabarty
    Pages 175-192
  12. Mohammad Tehranipoor, Ke Peng, Krishnendu Chakrabarty
    Pages 193-212

About this book

Introduction

This book introduces new techniques for detecting and diagnosing small-delay defects (SDD) in integrated circuits. Although this sort of timing defect is commonly found in integrated circuits manufactured with nanometer technology, this will be the first book to introduce effective and scalable methodologies for screening and diagnosing small-delay defects, including important parameters such as process variations, crosstalk, and power supply noise. This book presents new techniques and methodologies to improve overall SDD detection with very small pattern sets. These methods can result in pattern counts as low as a traditional 1-detect pattern set and long path sensitization and SDD detection similar to or even better than n-detect or timing-aware pattern sets. The important design parameters and pattern-induced noises such as process variations,power supply noise (PSN) and crosstalk are taken into account in the methodologies presented. A diagnostic flow is also presented to identify whether the failure is caused by PSN, crosstalk, or a combination of these two effects. * Provides an introduction to VLSI testing and diagnosis, with a focus on delay testing and small-delay defects; * Presents the most effective techniques for screening small-delay defects, such as long path-based, slack-based, critical fault-based, and noise-aware methodologies; * Shows readers to use timing information for small-delay defect diagnosis, in order to increase the resolution of their current diagnosis flow.

Keywords

Chip Testing Delay Testing Design for Test Integrated Circuits and Systems Nanometer Circuit Testing Small-delay defects VLSI Testing and Diagnosis

Authors and affiliations

  • Mohammad Tehranipoor
    • 1
  • Ke Peng
    • 2
  • Krishnendu Chakrabarty
    • 3
  1. 1., ECE Dept.University of ConnecticutStorrsUSA
  2. 2., Microcontroller Solutions GroupFreescale SemiconductorAustinUSA
  3. 3., ECEDuke UniversityDurhamUSA

Bibliographic information

  • DOI https://doi.org/10.1007/978-1-4419-8297-1
  • Copyright Information Springer Science+Business Media, LLC 2012
  • Publisher Name Springer, New York, NY
  • eBook Packages Engineering
  • Print ISBN 978-1-4419-8296-4
  • Online ISBN 978-1-4419-8297-1
  • About this book