Application-Specific Mesh-based Heterogeneous FPGA Architectures

  • Husain Parvez
  • Habib Mehrez

Table of contents

  1. Front Matter
    Pages i-xvii
  2. Husain Parvez, Habib Mehrez
    Pages 1-8
  3. Husain Parvez, Habib Mehrez
    Pages 9-30
  4. Husain Parvez, Habib Mehrez
    Pages 31-60
  5. Husain Parvez, Habib Mehrez
    Pages 61-75
  6. Husain Parvez, Habib Mehrez
    Pages 77-101
  7. Husain Parvez, Habib Mehrez
    Pages 103-117
  8. Husain Parvez, Habib Mehrez
    Pages 119-137
  9. Husain Parvez, Habib Mehrez
    Pages 139-144
  10. Back Matter
    Pages 145-150

About this book

Introduction

Low volume production of FPGA-based products is quite effective and economical because they are easy to design and program in the shortest amount of time. The generic reconfigurable resources in an FPGA can be programmed to execute a wide variety of applications at mutually exclusive times. However, the flexibility of FPGAs makes them much larger, slower, and more power consuming than their counterpart ASICs. Consequently, FPGAs are unsuitable for applications requiring high volume production, high performance or low power consumption.

This book presents a new exploration environment for mesh-based, heterogeneous FPGA architectures.  It describes state-of-the-art techniques for reducing area requirements in FPGA architectures, which also increase performance and enable reduction in power required.  Coverage focuses on reduction of FPGA area by introducing heterogeneous hard-blocks (such as multipliers, adders etc) in FPGAs, and by designing application specific FPGAs. Automatic FPGA layout generation techniques are employed to decrease non-recurring engineering (NRE) costs and time-to-market of application-specific, heterogeneous FPGA architectures.

  • Presents a new exploration environment for mesh-based, heterogeneous FPGA architectures;
  • Describes state-of-the-art techniques for reducing area requirements in FPGA architectures;
  • Enables reduction in power required and increase in performance.

Keywords

Circuits and Systems Embedded Systems FPGA Field Programmable Gate Array Mesh-based Heterogeneous FPGA

Authors and affiliations

  • Husain Parvez
    • 1
  • Habib Mehrez
    • 2
  1. 1.Paris VI, Laboratoire LIP6, Department SoC, Equipe CIANUniversite Pierre et Marie CurieParisFrance
  2. 2.Paris VI, Laboratoire LIP6Université Pierre et Marie CurieParisFrance

Bibliographic information

  • DOI https://doi.org/10.1007/978-1-4419-7928-5
  • Copyright Information Springer Science+Business Media, LLC 2011
  • Publisher Name Springer, New York, NY
  • eBook Packages Engineering
  • Print ISBN 978-1-4419-7927-8
  • Online ISBN 978-1-4419-7928-5
  • About this book