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Scalable Multi-core Architectures

Design Methodologies and Tools

  • Book
  • © 2012

Overview

Editors:
  1. Dimitrios Soudris

    1. Dept. Electrical & Computer Engineering, National Technical University of Athens, Athens, Greece

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    You can also search for this editor in PubMed   Google Scholar

  2. Axel Jantsch

    1. Dept. Electronic, Communication, &, Software Systems, Royal Institute of Technology, Kista, Sweden

    View editor publications

    You can also search for this editor in PubMed   Google Scholar

  • Describes trends towards distributed memory architectures and distributed power management Integrates Network on Chip with distributed, shared memory architectures
  • Demonstrates novel design methodologies and frameworks for multi-core design space exploration
  • Shows how midlleware services (dynamic data management) can be integrated into and support by the platform
  • Includes supplementary material: sn.pub/extras

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Table of contents (8 chapters)

  1. Front Matter

    Pages i-xiv
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  2. HW/SW/ Building Blocks: Architecture, Methods, and Techniques

    1. Front Matter

      Pages 1-1
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    2. Memory Architecture and Management in an NoC Platform

      • Axel Jantsch, Xiaowen Chen, Abdul Naeem, Yuang Zhang, Sando Penolazzi, Zhonghai Lu
      Pages 3-31

    3. Application-Specific Multi-Threaded Dynamic Memory Management

      • Sotirios Xydis, Alexandros Bartzas, Iraklis Anagnostopoulos, Dimitrios Soudris
      Pages 33-54

    4. Power Management Architecture in McNoC

      • Jean-Michel Chabloz, Ahmed Hemani
      Pages 55-80

    5. ASIP Exploration and Design

      • Jari Kreku, Kari Tiensyrjä, Andreas Wieferink, Bart Vanthournout
      Pages 81-103

  3. System-level Exploration

    1. Front Matter

      Pages 105-105
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    2. System Exploration

      • Jari Kreku, Kari Tiensyrjä
      Pages 107-137

    3. MPA: Parallelization Made Easy

      • Geert Vanmeerbeeck, Thomas J. Ashby
      Pages 139-170

  4. Industrial Applications

    1. Front Matter

      Pages 171-171
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    2. MPSoC Architecture Performance Analysis for Agile SDR Radio Applications

      • Sylvain Aguirre, Bernard Candaele
      Pages 173-196

    3. Application of the MOSART Flow on the WiMAX (802.16e) PHY Layer

      • Frank Ieromnimon, Dimitrios Kritharidis, Nikolaos S. Voros
      Pages 197-223
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Keywords

About this book

As Moore’s law continues to unfold, two important trends have recently emerged. First, the growth of chip capacity is translated into a corresponding increase of number of cores. Second, the parallelization of the computation and 3D integration technologies lead to distributed memory architectures. This book describes recent research that addresses urgent challenges in many-core architectures and application mapping. It addresses the architectural design of many core chips, memory and data management, power management, design and programming methodologies. It also describes how new techniques have been applied in various industrial case studies.

Reviews

From the reviews:

“This book presents to the general public the most important results from the Mapping Optimization for Scalable Multi-core Architecture (MOSART) research project, which was carried out between 2008 and 2010 (three years). It is quite brief and organized into three parts. … this book is well organized and balanced. Each chapter is self-explanatory and can be studied separately. The book as a whole is a good demonstration of engineering. It deserves to be recommended to professionals and research students in the area.” (D. Grigoras, ACM Computing Reviews, June, 2012)

Editors and Affiliations

  • Dept. Electrical & Computer Engineering, National Technical University of Athens, Athens, Greece

    Dimitrios Soudris

  • Dept. Electronic, Communication, &, Software Systems, Royal Institute of Technology, Kista, Sweden

    Axel Jantsch

Bibliographic Information

  • Book Title: Scalable Multi-core Architectures

  • Book Subtitle: Design Methodologies and Tools

  • Editors: Dimitrios Soudris, Axel Jantsch

  • DOI: https://doi.org/10.1007/978-1-4419-6778-7

  • Publisher: Springer New York, NY

  • eBook Packages: Engineering, Engineering (R0)

  • Copyright Information: Springer Science + Business Media, LLC 2012

  • Hardcover ISBN: 978-1-4419-6777-0

  • Softcover ISBN: 978-1-4899-9315-1

  • eBook ISBN: 978-1-4419-6778-7

  • Edition Number: 1

  • Number of Pages: XIV, 223

  • Topics: Circuits and Systems, Computer-Aided Engineering (CAD, CAE) and Design

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