Advertisement

Planar Double-Gate Transistor

From Technology to Circuit

  • Amara Amara
  • Olivier Rozeau

Table of contents

  1. Front Matter
    Pages i-viii
  2. Pages 1-2
  3. Thierry Poiroux, Maud Vinet, Simon Deleonibus
    Pages 3-25
  4. Daniela Munteanu, Jean-Luc Autran
    Pages 27-54
  5. Marina Reyboz, Olivier Rozeau, Thierry Poiroux
    Pages 55-88
  6. Jalal Jomaah, Gérard Ghibaudo
    Pages 89-104
  7. Philippe Freitas, David Navarro, Ian O'Connor, Gerard Billiot, Hervé Lapuyade, Jean-Baptiste Begueret
    Pages 105-136
  8. Ian O'Connor, Ilham Hassoune, Xi Yang, David Navarro
    Pages 137-165
  9. Bastien Giraud, Olivier Thomas, Amara Amara, Andrei Vladimirescu, Marc Belleville
    Pages 167-203
  10. Back Matter
    Pages 205-211

About this book

Introduction

This book on Double-Gates devices and circuit is unique and aims to reinforce the synergy between the research activities on CMOS sub-32nm devices and the design of elementary cells. The goal is to point out how we can take advantage of new transistor structures to come up with new basic cells and concepts that exploit the electrical features of these new devices and the breakthrough they bring.

Planar Double-Gate Transistor will mainly focus on SOI CMOS transistors, fully depleted with double independent planar Gates (Independent Planar Double Gates Transistors: IPDGT), a potential candidate for the sub-32 nm technological nodes as planned by the current ITRS Roadmap.

The book topics are mainly focusing on:

  • Detailed description of specific processes that allow the optimization of the CMOS IPDGT device

  • CMOS IPDGT modeling, both compact and physical models are presented

  • Device characterization

  • Design of innovating cells (SRAM cells, basic digital & analog functions) with the objectives to improve the level of integration and the robustness to variability as well as the power consumption optimization, using the degree of freedom introduced by the independent gates.

Keywords

CMOS Circuit Design Compact modelling Double-Gate MOSFET Fully Depleted Silicon On Insulator Leistungsfeldeffekttransistor analog circuit design analog design digital design field-effect transistor integrated circuit metal oxide semiconductur f

Editors and affiliations

  • Amara Amara
    • 1
  • Olivier Rozeau
    • 2
  1. 1.Institut Supérieur d'Electronique de Paris (ISEP)ParisFrance
  2. 2.CEA, LETI-MINATECFrance

Bibliographic information

  • DOI https://doi.org/10.1007/978-1-4020-9341-8
  • Copyright Information Springer Netherlands 2009
  • Publisher Name Springer, Dordrecht
  • eBook Packages Engineering
  • Print ISBN 978-1-4020-9327-2
  • Online ISBN 978-1-4020-9341-8
  • Buy this book on publisher's site