High-Level Synthesis

From Algorithm to Digital Circuit

  • Philippe Coussy
  • Adam Morawiec

Table of contents

  1. Front Matter
    Pages i-xv
  2. Pascal Urard, Joonhwan Yi, Hyukmin Kwon, Alexandre Gouraud
    Pages 1-12
  3. Rajesh Gupta, Forrest Brewer
    Pages 13-28
  4. Shail Aditya, Vinod Kathail
    Pages 53-74
  5. Zhiru Zhang, Yiping Fan, Wei Jiang, Guoling Han, Changqi Yang, Jason Cong
    Pages 99-112
  6. Kazutoshi Wakabayashi, Benjamin Carrion Schafer
    Pages 113-127
  7. Philippe Coussy, Cyrille Chavet, Pierre Bomel, Dominique Heller, Eric Senn, Eric Martin
    Pages 147-169
  8. Ivan Augé, Frédéric Pétrot
    Pages 171-196
  9. Christos-Savvas Bouganis, George A. Constantinides
    Pages 197-214
  10. Steven Derrien, Sanjay Rajopadhye, Patrice Quinton, Tanguy Risset
    Pages 215-230
  11. Gang Wang, Wenrui Gong, Ryan Kastner
    Pages 231-255
  12. María Carmen Molina, Rafael Ruiz-Sautua, José Manuel Mendías, Román Hermida
    Pages 257-283
  13. Li Shang, Robert P. Dick, Niraj K. Jha
    Pages 285-297

About this book

Introduction

The successful usage of Hardware Description Languages like VHDL and Verilog in design flows is mainly due to the availability of efficient synthesis methods and tools that enable the translation of RTL designs into optimized gate-level implementations. Many expect that the same approach could be effectively adapted at higher levels of abstraction. In the SoCs context, the traditional IC design methodology relying on EDA tools used in a two stages design flow - a VHDL/Verilog RTL specification, followed by logical and physical synthesis - is indeed no more suitable. Thus, actual complex SoCs need new ESL level tools in order to raise the specification abstraction level up to the algorithmic / behavioral one. However, in order to provide the designers with an efficient automated path to implementation, new high-level synthesis tools and approaches are required.

The main expectations from the system design teams concern both methods and tools supporting better management of the design complexity and reduction of the design cycle all together, breaking the trend to compromise evaluation of various design implementation options. Designing at higher levels of abstraction is an obvious way as it allows a better coping with the system design complexity, to verify earlier in the design process and to increase code reuse.

This book presents an excellent collection of contributions addressing different aspects of high-level synthesis from both industry and academia. High-Level Synthesis: from Algorithm to Digital Circuit should be on each designer’s and CAD developer’s shelf, as well as on those of project managers who will soon embrace high level design and synthesis for all aspects of digital system design.

Keywords

ASIC Electronic Design Automation (EDA) Electronic System Level (ESL) FPGA Field Programmable Gate Array Hardware Hardwarebeschreibungssprache SystemC algorithms circuit design automation electronic design automation integrated circuit scheduling system on chip (SoC)

Editors and affiliations

  • Philippe Coussy
    • 1
  • Adam Morawiec
    • 2
  1. 1.Laboratoire Lab-STICC Centre de RechercheUniversité Européenne de Bretagne - UBSFrance
  2. 2.European Electronic Chips & Systems design Initiative (ECSI)GrieresFrance

Bibliographic information

  • DOI https://doi.org/10.1007/978-1-4020-8588-8
  • Copyright Information Springer Science + Business Media B.V 2008
  • Publisher Name Springer, Dordrecht
  • eBook Packages Engineering
  • Print ISBN 978-1-4020-8587-1
  • Online ISBN 978-1-4020-8588-8
  • About this book