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VLSI: Systems on a Chip

IFIP TC10 WG10.5 Tenth International Conference on Very Large Scale Integration (VLSI’99) December 1–4, 1999, Lisboa, Portugal

  • Luis Miguel Silveira
  • Srinivas Devadas
  • Ricardo Reis

Part of the IFIP — The International Federation for Information Processing book series (IFIPAICT, volume 34)

Table of contents

  1. Front Matter
    Pages i-xviii
  2. Geoffrey B. Jackson, Saleel V. Awsare, Lawrence D. Engh, Mark A. Hemming, Peter Holzmann, Oliver C. Kao et al.
    Pages 11-22
  3. Yue Wu, Shenggao Li, Mohammed Ismail, Håkan Olsson
    Pages 35-46
  4. S. S. Rajput, S. S. Jamuar
    Pages 47-60
  5. Yue Wu, Hong-sun Kim, Fredrik Jonsson, Mohammed Ismail, Håkan Olsson
    Pages 61-68
  6. N. Masoumi, M. I. Elmasry, S. Safavi-Naeini
    Pages 69-76
  7. Atsushi Iwata, Makoto Nagata, Hiroyuki Nakamoto, Noriaki Takeda, Mitsuru Homma, Hiroto Higashi et al.
    Pages 77-88
  8. A. M. Rassau, G. Alagoda, D. Lucas, J. Austin-Crowe, K. Eshraghian
    Pages 89-100
  9. Camille Diou, Lionel Torres, Michel Robert
    Pages 101-112
  10. Abdellah Touhafi, Wouter Brissinck, Erik Dirkx
    Pages 113-124
  11. Russell Tessier
    Pages 125-136
  12. Nuno Lau, Valery Sklyarov
    Pages 137-148
  13. R. V. K. Pillai, D. Al-Khalili, A. J. Al-Khalili
    Pages 149-160
  14. C. Ninos, H. T. Vergos, D. Nikolos
    Pages 161-172
  15. J. Alcântara, S. Salomão, E. Granja, V. Alves, F. França
    Pages 173-180
  16. Rui L. Aguiar, Dinis M. Santos
    Pages 181-191
  17. Mihai Munteanu, Peter A. Ivey, Luke Seed, Marios Psilogeorgopoulos, Neil Powell, Istvan Bogdan
    Pages 206-217
  18. António Mota, Nuno Ferreira, Arlindo Oliveira, José Monteiro
    Pages 233-244
  19. S. Lachowicz, K. Eshraghian, H-J. Pfleiderer
    Pages 245-256
  20. J. Soares Augusto, C. F. Beltrán Almeida
    Pages 269-280
  21. Raimund Ubar, Dominique Borrione
    Pages 281-292
  22. Bogdan Tutuianu, Daksh Lehther, Madhulima Pandey, Ross Baldick
    Pages 293-304
  23. Adrián Núñez-Aldana, Ranga Vemuri
    Pages 318-325
  24. Augusto Gallegos, Philippe Silvestre, Michel Robert, Daniel Auvergne
    Pages 326-333
  25. Rolf Drechsler, Wolfgang Günther
    Pages 334-345
  26. Luca P. Carloni, Evguenii I. Goldberg, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Pages 346-361
  27. Joonyoung Kim, João Marques Silva, Karem A. Sakallah
    Pages 362-372
  28. Rajeev Murgai, Masahiro Fujita, Fumiyasu Hirose
    Pages 385-397
  29. Tom Chen, Isabelle Munn, Anneliese von Mayrhauser, Amjad Hajjar
    Pages 398-406
  30. S. Raimbault, G. Sassatelli, G. Cambon, M. Robert, S. Pillement, L. Torres
    Pages 407-414
  31. F. Moraes, M. Robert, D. Auvergne
    Pages 415-426
  32. Fernanda Lima, Marcelo Johann, José Güntzel, Eduardo D’Avila, Luigi Carro, Ricardo Reis
    Pages 439-446
  33. Stefan Thomas Obenaus, Ted H. Szymanski
    Pages 447-455
  34. Edoardo Charbon, Joel Phillips
    Pages 456-472
  35. Marcio Yukio Teruya, Marius Strum, Wang Jiang Chau
    Pages 473-484
  36. João M. P. Cardoso, Horácio C. Neto
    Pages 485-496
  37. F. R. Wagner, M. Oyamada, L. Carro, M. Kreutz
    Pages 497-508
  38. Christophe Jego, Emmanuel Casseau, Eric Martin
    Pages 509-520
  39. R. Lerch, M. Kaltenbacher, H. Landes
    Pages 521-532
  40. K. Liateni, D. Moulinier, B. Affour, A. Delpoux, M. A. Maher, J. M. Karam
    Pages 544-555
  41. Joel R. Phillips, Dan Feng
    Pages 557-568

About this book

Introduction

For over three decades now, silicon capacity has steadily been doubling every year and a half with equally staggering improvements continuously being observed in operating speeds. This increase in capacity has allowed for more complex systems to be built on a single silicon chip. Coupled with this functionality increase, speed improvements have fueled tremendous advancements in computing and have enabled new multi-media applications. Such trends, aimed at integrating higher levels of circuit functionality are tightly related to an emphasis on compactness in consumer electronic products and a widespread growth and interest in wireless communications and products. These trends are expected to persist for some time as technology and design methodologies continue to evolve and the era of Systems on a Chip has definitely come of age. While technology improvements and spiraling silicon capacity allow designers to pack more functions onto a single piece of silicon, they also highlight a pressing challenge for system designers to keep up with such amazing complexity. To handle higher operating speeds and the constraints of portability and connectivity, new circuit techniques have appeared. Intensive research and progress in EDA tools, design methodologies and techniques is required to empower designers with the ability to make efficient use of the potential offered by this increasing silicon capacity and complexity and to enable them to design, test, verify and build such systems.

Keywords

ASIC Embedded Systems FPGA Hardware Transistor VLSI algorithms construction integrated circuit layout micro-alloy transistor, MAT modeling simulation static-induction transistor verification

Editors and affiliations

  • Luis Miguel Silveira
    • 1
  • Srinivas Devadas
    • 2
  • Ricardo Reis
    • 3
  1. 1.Systems and Computers Research Institute (INESC) and Cadence Europeans Laboratories (CEL), Dept. of Electrical and Computer Engineering, Instituto Superior Técnico (IST)Technical University of LisbonLisbonPortugal
  2. 2.Laboratory for Computer Science, Dept. of Elect. Eng. and Comp. ScienceMassachusetts Institute of TechnologyCambridgeUSA
  3. 3.Instituto de InformáticaUniversidade Federal do Rio Grande do SulPorto AlegreBrazil

Bibliographic information

  • DOI https://doi.org/10.1007/978-0-387-35498-9
  • Copyright Information IFIP International Federation for Information Processing 2000
  • Publisher Name Springer, Boston, MA
  • eBook Packages Springer Book Archive
  • Print ISBN 978-1-4757-1014-4
  • Online ISBN 978-0-387-35498-9
  • Series Print ISSN 1868-4238
  • Series Online ISSN 1868-422X
  • Buy this book on publisher's site