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Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation

12th International Workshop, PATMOS 2002 Seville, Spain, September 11–13, 2002 Proceedings

  • Bertrand Hochet
  • Antonio J. Acosta
  • Manuel J. Bellido
Conference proceedings PATMOS 2002

Part of the Lecture Notes in Computer Science book series (LNCS, volume 2451)

Table of contents

  1. Front Matter
    Pages I-XVI
  2. Opening

    1. Christian Piguet
      Pages 1-15
  3. Arithmetics

    1. D. Helms, E. Schmidt, A. Schulz, A. Stammermann, W. Nebel
      Pages 16-24
    2. Hoang Q. Dao, Vojin G. Oklobdzija
      Pages 25-34
    3. F. Pessolano, J. Kessels, A. Peeters
      Pages 35-44
  4. Low-Level Modeling and Characterization

    1. Juan-Antonio Carballo, Sani R. Nassif
      Pages 45-54
    2. Armin Windschiegl, Paul Zuber, Walter Stechele
      Pages 55-64
    3. F. Picot, P. Coll, D. Auvergne
      Pages 65-70
    4. S. Nikolaidis, N. Kavvadias, P. Neofotistos, K. Kosmatopoulos, T. Laopoulos, L. Bisdounis
      Pages 71-80
  5. Asynchronous and Adiabatic Techniques

    1. Emmanuel Allier, Laurent Fesquet, Marc Renaudin, Gilles Sicard
      Pages 81-91
    2. Christoph Saas, Josef A. Nossek
      Pages 101-107
    3. Oscar Garnica, Juan Lanchares, Román Hermida
      Pages 108-117
    4. Antonio Blotti, Maurizio Castellucci, Roberto Saletti
      Pages 118-127
  6. CAD Tools and Algorithms

    1. Torsten Mahnke, Walter Stechele, Wolfgang Hoeld
      Pages 146-155
    2. A. Landrault, L. Pellier, A. Richard, C. Jay, M. Robert, D. Auvergne
      Pages 156-166
    3. Fadi A. Aloul, Soha Hassoun, Karem A. Sakallah, David Blaauw
      Pages 167-177
  7. Timing

    1. Daniel González, Antonio García, Graham A. Jullien, Javier Ramírez, Luis Parrilla, Antonio Lloris
      Pages 188-197
    2. M. R. Casu, M. Graziano, G. Masera, G. Piccinini, M. M. Prono, M. Zamboni
      Pages 198-208
    3. Raúl Jiménez, Pilar Parra, Pedro Sanmartín, Antonio Acosta
      Pages 209-218
  8. Gate-Level Modeling

    1. José Luis Rossello, Jaume Segura
      Pages 219-228
    2. S. Nikolaidis, H. Pournara, A. Chatzigeorgiou
      Pages 229-238
    3. M. Alioto, G. Palumbo, M. Poli
      Pages 239-246
  9. Memory Optimization

    1. Murali Jayapala, Francisco Barat, Pieter Op de Beeck, Francky Catthoor, Geert Deconinck, Henk Corporaal
      Pages 258-267
    2. Hiroshi Takamura, Koji Inoue, Vasily G. Moshnyaga
      Pages 278-288
    3. Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose
      Pages 289-299
  10. High-Level Modeling and Design

    1. Luca Benini, Alberto Macii, Enrico Macii
      Pages 314-322
    2. N. D. Zervas, G. Pagkless, M. Dasigenis, D. Soudris
      Pages 323-331
    3. Eric Senn, Nathalie Julien, Johann Laurent, Eric Martin
      Pages 332-341
  11. Communications Modeling and Activity Reduction

    1. Claudia Kretzschmar, Robert Siegmund, Dietmar Müller
      Pages 342-352
    2. C. Baena, J. Juan-Chico, M. J. Bellido, P. Ruiz de Clavijo, C. J. Jiménez, M. Valencia
      Pages 353-362
    3. G. Sutter, E. Todorovich, S. Lopez-Buedo, E. Boemo
      Pages 363-370
    4. Alejandro Linares-Barranco, Gabriel Jiménez, Antón Civit, Bernabé Linares-Barranco
      Pages 371-379
  12. Posters

    1. Toshinori Sato, Itsujiro Arita
      Pages 380-389
    2. Mohammed Es Salhiene, Laurent Fesquet, Marc Renaudin
      Pages 390-399
    3. Paulino Ruiz-de-Clavijo, Jorge Juan, Manuel J. Bellido, Alejandro Millán, David Guerrero
      Pages 400-408
    4. Kostas Masselos, Panagiotis Merakos, Costas E. Goutis
      Pages 409-418
    5. Artur Wróblewski, Florian Auernhammer, Josef A. Nossek
      Pages 419-428
    6. Pilar Parra, Antonio Acosta, Manuel Valencia
      Pages 448-457
    7. Alejandro Millán, Jorge Juan, Manuel J. Bellido, Paulino Ruiz-de-Clavijo, David Guerrero
      Pages 477-486
    8. Razvan Ionita, Andrei Vladimirescu, Paul Jespers
      Pages 487-493

About these proceedings

Introduction

The International Workshop on Power and Timing Modeling, Optimization, and Simulation PATMOS 2002, was the 12th in a series of international workshops 1 previously held in several places in Europe. PATMOS has over the years evolved into a well-established and outstanding series of open European events on power and timing aspects of integrated circuit design. The increased interest, espe- ally in low-power design, has added further momentum to the interest in this workshop. Despite its growth, the workshop can still be considered as a very - cused conference, featuring high-level scienti?c presentations together with open discussions in a free and easy environment. This year, the workshop has been opened to both regular papers and poster presentations. The increasing number of worldwide high-quality submissions is a measure of the global interest of the international scienti?c community in the topics covered by PATMOS. The objective of this workshop is to provide a forum to discuss and inves- gate the emerging problems in the design methodologies and CAD-tools for the new generation of IC technologies. A major emphasis of the technical program is on speed and low-power aspects with particular regard to modeling, char- terization, design, and architectures. The technical program of PATMOS 2002 included nine sessions dedicated to most important and current topics on power and timing modeling, optimization, and simulation. The three invited talks try to give a global overview of the issues in low-power and/or high-performance circuit design.

Keywords

algorithm communication integrated circuit modeling optimization simulation tools

Editors and affiliations

  • Bertrand Hochet
    • 1
  • Antonio J. Acosta
    • 2
  • Manuel J. Bellido
    • 2
  1. 1.Ecole d’Ingénieurs du Canton de Vaud Microelectronics and Systems Institute, Digital Communications TeamSwiss University of Applied ScienceYverdonSwitzerland
  2. 2.Instituto de Microelectrónica de Sevilla-CNM-CSIC Departamento do Diseño Digital Departamento de Electrónica y Electromagnetismo Departamento de Tecnología ElectrónicaUniversidad de Sevilla

Bibliographic information

  • DOI https://doi.org/10.1007/3-540-45716-X
  • Copyright Information Springer-Verlag Berlin Heidelberg 2002
  • Publisher Name Springer, Berlin, Heidelberg
  • eBook Packages Springer Book Archive
  • Print ISBN 978-3-540-44143-4
  • Online ISBN 978-3-540-45716-9
  • Series Print ISSN 0302-9743
  • Buy this book on publisher's site