Book Volume 29 2005

Introduction to Advanced System-on-Chip Test Design and Optimization

Authors:

ISBN: 978-1-4020-3207-3 (Print) 978-0-387-25624-5 (Online)

Table of contents (15 chapters)

  1. Front Matter

    Pages i-xvii

  2. Testing Concepts

    1. No Access

      Chapter

      Pages 1-4

      Introduction

    2. No Access

      Chapter

      Pages 5-19

      Design Flow

    3. No Access

      Chapter

      Pages 21-52

      Design for Test

    4. No Access

      Chapter

      Pages 53-64

      Boundary Scan

  3. SOC Design for Testability

    1. No Access

      Chapter

      Pages 67-75

      System Modeling

    2. No Access

      Chapter

      Pages 77-87

      Test Conflicts

    3. No Access

      Chapter

      Pages 89-98

      Test Power Dissipation

    4. No Access

      Chapter

      Pages 99-114

      Test Access Mechanism

    5. No Access

      Chapter

      Pages 115-160

      Test Scheduling

  4. SOC Test Applications

    1. No Access

      Chapter

      Pages 163-185

      A Reconfigurable Power-Conscious Core Wrapper and its Application to System-on-Chip Test Scheduling

    2. No Access

      Chapter

      Pages 187-214

      An Integrated Framework for the Design and Optimization of SOC Test Solutions

    3. No Access

      Chapter

      Pages 215-251

      Efficient Test Solutions for Core-Based Designs

    4. No Access

      Chapter

      Pages 253-276

      Core Selection in the SOC Test Design-Flow

    5. No Access

      Chapter

      Pages 277-290

      Defect-Aware Test Scheduling

    6. No Access

      Chapter

      Pages 291-319

      An Integrated Technique for Test Vector Selection and Test Scheduling under ATE Memory Depth Constraint

  5. Back Matter

    Pages 321-388