Design for AT-Speed Test, Diagnosis and Measurement

  • Benoit Nadeau-Dostie

Part of the Frontiers in Electronic Testing book series (FRET, volume 15)

Table of contents

  1. Front Matter
    Pages i-xvii
  2. Pages 1-33
  3. Pages 117-137
  4. Back Matter
    Pages 217-239

About this book

Introduction

Design for AT-Speed Test, Diagnosis and Measurement is the first book to offer practical and proven design-for-testability (DFT) solutions to chip and system design engineers, test engineers and product managers at the silicon level as well as at the board and systems levels. Designers will see how the implementation of embedded test enables simplification of silicon debug and system bring-up. Test engineers will determine how embedded test provides a superior level of at-speed test, diagnosis and measurement without exceeding the capabilities of their equipment. Product managers will learn how the time, resources and costs associated with test development, manufacture cost and lifecycle maintenance of their products can be significantly reduced by designing embedded test in the product. A complete design flow and analysis of the impact of embedded test on a design makes this book a `must read' before any DFT is attempted.

Keywords

development diagnosis drift transistor logic system design

Editors and affiliations

  • Benoit Nadeau-Dostie
    • 1
  1. 1.Logic Vision, Inc.USA

Bibliographic information

  • DOI https://doi.org/10.1007/b117472
  • Copyright Information Kluwer Academic Publishers 2000
  • Publisher Name Springer, Boston, MA
  • eBook Packages Springer Book Archive
  • Print ISBN 978-0-7923-8669-8
  • Online ISBN 978-0-306-47544-3
  • Series Print ISSN 0929-1296
  • About this book