Regular Fabrics in Deep Sub-Micron Integrated-Circuit Design discusses new approaches to better timing-closure and manufacturability of DSM Integrated Circuits. The key idea presented is the use of regular circuit and interconnect structures such that area/delay can be predicted with high accuracy. The co-design of structures and algorithms allows great opportunities for achieving better final results, thus closing the gap between IC and CAD designers. The regularities also provide simpler and possibly better manufacturability. In this book we present not only algorithms for solving particular sub-problems but also systematic ways of organizing different algorithms in a flow to solve the design problem as a whole. A timing-driven chip design flow is developed based on the new structures and their design algorithms, which produces faster chips in a shorter time.
CMOS Computer-Aided Design (CAD) Standard Transistor algorithms automation circuit design integrated circuit system on chip (SoC)
Authors and affiliations
Robert K. Brayton
1.University of CaliforniaBerkeley
Book TitleRegular Fabrics in Deep Sub-Micron Integrated-Circuit Design