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Design and Testing of Reversible Logic

  • Ashutosh Kumar Singh
  • Masahiro Fujita
  • Anand Mohan
Book

Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 577)

Table of contents

  1. Front Matter
    Pages i-xiv
  2. Fundamental Concepts

    1. Front Matter
      Pages 1-1
    2. H. M. Gaur, T. N. Sasamal, A. K. Singh, A. Mohan, D. K. Pradhan
      Pages 3-18
  3. Design & Synthesis

    1. Front Matter
      Pages 19-19
    2. I. Gassoumi, L. Touil, B. Ouni
      Pages 21-35
    3. T. N. Sasamal, H. M. Gaur, A. K. Singh, A. Mohan
      Pages 37-48
    4. C. Bandyopadhyay, S. Parekh, D. Roy, H. Rahaman
      Pages 49-64
    5. T. N. Sasamal, H. M. Gaur, A. K. Singh, A. Mohan
      Pages 115-128
  4. Test Approaches

    1. Front Matter
      Pages 129-129
    2. H. M. Gaur, T. N. Sasamal, A. K. Singh, A. Mohan
      Pages 153-167
    3. B. Mondal, C. Bandyopadhyay, A. Bhattacharjee, H. Rahaman
      Pages 169-184
  5. Applications to Emerging Technologies

    1. Front Matter
      Pages 213-213
    2. A. Bhattacharjee, C. Bandyopadhyay, B. Mondal, Robert Wille, Rolf Drechsler, H. Rahaman
      Pages 215-231
    3. A. Kamaraj, P. Marichamy, J. Senthil Kumar, S. Selva Nidhyananthan, C. Kalyana Sundaram
      Pages 233-250
  6. Back Matter
    Pages 263-265

About this book

Introduction

The book compiles efficient design and test methodologies for the implementation of reversible logic circuits. The methodologies covered in the book are design approaches, test approaches, fault tolerance in reversible circuits and physical implementation techniques. The book also covers the challenges and the reversible logic circuits to meet these challenges stimulated during each stage of work cycle. The novel computing paradigms are being explored to serve as a basis for fast and low power computation.

Keywords

Reversible Logic Circuits Design & Automation Design for Testability Fault Tolerance Computing Emerging Technologies Quantum Computation Reversible Logic Testing Fault Detection Logic Circuit Optimization Probabilistic Synthesis Approaches

Editors and affiliations

  • Ashutosh Kumar Singh
    • 1
  • Masahiro Fujita
    • 2
  • Anand Mohan
    • 3
  1. 1.Department of Computer ApplicationsNational Institute of TechnologyKurukshetraIndia
  2. 2.VLSI Design and Education CenterUniversity of TokyoTokyoJapan
  3. 3.Department of Electronics EngineeringIndian Institute of TechnologyVaranasiIndia

Bibliographic information

  • DOI https://doi.org/10.1007/978-981-13-8821-7
  • Copyright Information Springer Nature Singapore Pte Ltd. 2020
  • Publisher Name Springer, Singapore
  • eBook Packages Engineering Engineering (R0)
  • Print ISBN 978-981-13-8820-0
  • Online ISBN 978-981-13-8821-7
  • Series Print ISSN 1876-1100
  • Series Online ISSN 1876-1119
  • Buy this book on publisher's site