Guide to FPGA Implementation of Arithmetic Functions

  • Jean-Pierre Deschamps
  • Gustavo D. Sutter
  • Enrique Cantó
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 149)

Table of contents

  1. Front Matter
    Pages i-xv
  2. Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
    Pages 1-22
  3. Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
    Pages 23-54
  4. Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
    Pages 55-81
  5. Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
    Pages 83-94
  6. Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
    Pages 95-125
  7. Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
    Pages 127-151
  8. Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cant
    Pages 153-182
  9. Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
    Pages 183-220
  10. Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
    Pages 221-249
  11. Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
    Pages 251-275
  12. Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
    Pages 277-303
  13. Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
    Pages 305-336
  14. Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
    Pages 337-355
  15. Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
    Pages 357-369
  16. Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
    Pages 371-434
  17. Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
    Pages 435-459
  18. Back Matter
    Pages 461-469

About this book

Introduction

This book is designed both for FPGA users interested in developing new, specific components - generally for reducing execution times –and IP core designers interested in extending their catalog of specific components.  The main focus is circuit synthesis and the discussion shows, for example, how a given algorithm executing some complex function can be translated to a synthesizable circuit description, as well as which are the best choices the designer can make to reduce the circuit cost, latency, or power consumption.  This is not a book on algorithms.  It is a book that shows how to translate efficiently an algorithm to a circuit, using techniques such as parallelism, pipeline, loop unrolling, and others.  Numerous examples of FPGA implementation are described throughout this book and the circuits are modeled in VHDL. Complete and synthesizable source files are available for download.

Keywords

Algorithms Embedded Systems FPGA Reconfigurable Computing System-on-Chip

Authors and affiliations

  • Jean-Pierre Deschamps
    • 1
  • Gustavo D. Sutter
    • 2
  • Enrique Cantó
    • 3
  1. 1.University Rovira i VirgiliTarragonaSpain
  2. 2., School of Computer EngineeringUniversidad Autonoma de MadridMadridSpain
  3. 3.University Rovira i VirgiliTarragonaSpain

Bibliographic information

  • DOI https://doi.org/10.1007/978-94-007-2987-2
  • Copyright Information Springer Science+Business Media Dordrecht 2012
  • Publisher Name Springer, Dordrecht
  • eBook Packages Engineering
  • Print ISBN 978-94-007-2986-5
  • Online ISBN 978-94-007-2987-2
  • Series Print ISSN 1876-1100
  • Series Online ISSN 1876-1119