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Hardware and Software: Verification and Testing

8th International Haifa Verification Conference, HVC 2012, Haifa, Israel, November 6-8, 2012. Revised Selected Papers

  • Armin Biere
  • Amir Nahir
  • Tanja Vos
Conference proceedings HVC 2012

Part of the Lecture Notes in Computer Science book series (LNCS, volume 7857)

Table of contents

  1. Front Matter
    PDF
  2. On Behavioral Programming
    David Harel
    Pages 1-1
  3. Verifying Real-Time Software Is Not Reasonable (Today)
    Edward A. Lee
    Pages 2-2
  4. SMT in Verification, Modeling, and Testing at Microsoft
    Nikolaj Bjørner
    Pages 3-3
  5. Reducing Costs While Increasing Quality
    Orna Raz
    Pages 4-4
  6. Special Session on Security Verification
    Alex Goryachev
    Pages 5-5
  7. Circuit Primitives for Monitoring Information Flow and Enabling Redundancy
    Ryan Kastner
    Pages 6-6
  8. Formal Analysis of Security Data Paths in RTL Design
    Jamil Mazzawi, Ziyad Hanna
    Pages 7-7
  9. Precise Detection of Atomicity Violations
    Ricardo J. Dias, Vasco Pessanha, João M. Lourenço
    Pages 8-23
  10. Proving Mutual Termination of Programs
    Dima Elenbogen, Shmuel Katz, Ofer Strichman
    Pages 24-39
  11. Knowledge Based Transactional Behavior
    Saddek Bensalem, Marius Bozga, Doron Peled, Jean Quilbeuf
    Pages 40-55
  12. Repair with On-The-Fly Program Analysis
    Robert Könighofer, Roderick Bloem
    Pages 56-71
  13. Computing Interpolants without Proofs
    Hana Chockler, Alexander Ivrii, Arie Matsliah
    Pages 72-85
  14. MaxSAT-Based MCS Enumeration
    Antonio Morgado, Mark Liffiton, Joao Marques-Silva
    Pages 86-101
  15. Automated Reencoding of Boolean Formulas
    Norbert Manthey, Marijn J. H. Heule, Armin Biere
    Pages 102-117
  16. Leveraging Accelerated Simulation for Floating-Point Regression
    John Paul, Elena Guralnik, Anatoly Koyfman, Amir Nahir, Subrat K. Panda
    Pages 118-131
  17. Coverage-Based Trace Signal Selection for Fault Localisation in Post-silicon Validation
    Charlie Shucheng Zhu, Georg Weissenbacher, Sharad Malik
    Pages 132-147
  18. A Novel Approach for Implementing Microarchitectural Verification Plans in Processor Designs
    Yoav Katz, Michal Rimon, Avi Ziv
    Pages 148-161
  19. Statistical Model Checking for Safety Critical Hybrid Systems: An Empirical Evaluation
    Youngjoo Kim, Moonzoo Kim, Tai-Hyo Kim
    Pages 162-177
  20. A New Test-Generation Methodology for System-Level Verification of Production Processes
    Allon Adir, Alex Goryachev, Lev Greenberg, Tamer Salman, Gil Shurek
    Pages 178-192
  21. Defining and Model Checking Abstractions of Complex Railway Models Using CSP||B
    Faron Moller, Hoang Nga Nguyen, Markus Roggenbach, Steve Schneider, Helen Treharne
    Pages 193-208
  22. Word Equations with Length Constraints: What’s Decidable?
    Vijay Ganesh, Mia Minnes, Armando Solar-Lezama, Martin Rinard
    Pages 209-226
  23. Environment-Friendly Safety
    Orna Kupferman, Sigal Weiner
    Pages 227-242
  24. Deterministic Compilation of Temporal Safety Properties in Explicit State Model Checking
    Kristin Yvonne Rozier, Moshe Y. Vardi
    Pages 243-259
  25. FoREnSiC– An Automatic Debugging Environment for C Programs
    Roderick Bloem, Rolf Drechsler, Görschwin Fey, Alexander Finder, Georg Hofferek, Robert Könighofer et al.
    Pages 260-265
  26. Towards Beneficial Hardware Acceleration in HAVEN: Evaluation of Testbed Architectures
    Marcela Šimková, Ondřej Lengál
    Pages 266-273
  27. Using Domain Specific Languages to Support Verification in the Railway Domain
    Phillip James, Arnold Beckmann, Markus Roggenbach
    Pages 274-275
  28. From Fault Injection to Mutant Injection: The Next Step for Safety Analysis?
    Guillermo Rodriguez-Navas, Patrick Graydon, Iain Bate
    Pages 276-277
  29. Test Case Generation by Grammar-Based Fuzzing for Model-Driven Engineering
    Magdalena Widl
    Pages 278-279
  30. Back Matter
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About these proceedings

Introduction

This book constitutes the thoroughly refereed proceedings of the 8th International Haifa Verification Conference, HVC 2012, held in Haifa, Israel in November 2012. The 18 revised full papers presented together with 3 poster presentations were carefully reviewed and selected from 36 submissions. They focus on the future directions of testing and verification for hardware, software, and complex hybrid systems.

Keywords

UML component based design fault tolerant modeling model checking safety-critical systems

Editors and affiliations

  • Armin Biere
    • 1
  • Amir Nahir
    • 2
  • Tanja Vos
    • 3
  1. 1.Institute for Formal Models and VerificationJohannes Kepler UniversityLinzAustria
  2. 2.IBM Research LaboratoryHaifaIsrael
  3. 3.Universidad Politecnica de ValenciaValenciaSpain

Bibliographic information

  • DOI https://doi.org/10.1007/978-3-642-39611-3
  • Copyright Information Springer-Verlag Berlin Heidelberg 2013
  • Publisher Name Springer, Berlin, Heidelberg
  • eBook Packages Computer Science
  • Print ISBN 978-3-642-39610-6
  • Online ISBN 978-3-642-39611-3
  • Series Print ISSN 0302-9743
  • Series Online ISSN 1611-3349
  • Buy this book on publisher's site