Progress in VLSI Design and Test

16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings

  • Hafizur Rahaman
  • Sanatan Chattopadhyay
  • Santanu Chattopadhyay
Part of the Lecture Notes in Computer Science book series (LNCS, volume 7373)

Table of contents

  1. Front Matter
  2. Lower Power 1

  3. Analog VLSI Design I

    1. Gunti Nagendra Babu, Brajesh Kumar Kaushik, Anand Bulusu, Manoj Kumar Majumder
      Pages 40-45
    2. Ashutosh Nandi, Ashok K. Saxena, Sudeb Dasgupta
      Pages 46-51
  4. Test and Verification I

    1. Surajit Kumar Roy, Dona Roy, Chandan Giri, Hafizur Rahaman
      Pages 59-68
    2. Soumyadip Bandyopadhyay, Kunal Banerjee, Dipankar Sarkar, Chittaranjan R. Mandal
      Pages 69-78
  5. Design Techniques I

    1. Prabir Saha, Arindam Banerjee, Anup Dandapat, Partha Bhattacharyya
      Pages 79-88
  6. Algorithms and Applications I

    1. Subrata Das, Partha Sarathi Dasgupta, Samar Sensarma
      Pages 111-120
    2. Dushyant Juneja, Sougata Kar, Procheta Chatterjee, Siddhartha Sen
      Pages 121-128
    3. Goutam Rana, Samir Kumar Lahiri, Chirasree Roy Chaudhuri
      Pages 129-138
  7. Lower Power II

    1. Chandrabhan Kushwah, Santosh K. Vishvakarma
      Pages 139-146
    2. Arun Dobriyal, Rahul Gonnabattula, Pallab Dasgupta, Chittaranjan R. Mandal
      Pages 147-155
    3. Rituparna Dasgupta, Dipankar Saha, Jagannath Samanta, Sayan Chatterjee, Chandan Kumar Sarkar
      Pages 156-165
  8. Analog VLSI Design II

About these proceedings


This book constitutes the refereed proceedings of the 16th International Symposium on VSLI Design and Test, VDAT 2012, held in Shibpur, India, in July 2012.
The 30 revised regular papers presented together with 10 short papers and 13 poster sessions were carefully selected from 135 submissions.
The papers are organized in topical sections on VLSI design, design and modeling of digital circuits and systems, testing and verification, design for testability, testing memories and regular logic arrays, embedded systems: hardware/software co-design and verification, emerging technology: nanoscale computing and nanotechnology.


NoC and SoC systems arithmetic algorithms embedded systems fault tolerance quantum computing

Editors and affiliations

  • Hafizur Rahaman
    • 1
  • Sanatan Chattopadhyay
    • 2
  • Santanu Chattopadhyay
    • 3
  1. 1.Department of Information TechnologyBengal Engineering and Science University ShibpurHowrahIndia
  2. 2.Department of Electronic ScienceUniversity of CalcuttaKolkataIndia
  3. 3.Department of Electronics and Electrical Comm. Engg.Indian Institute of Technology KharagpurIndia

Bibliographic information

  • DOI
  • Copyright Information Springer-Verlag Berlin Heidelberg 2012
  • Publisher Name Springer, Berlin, Heidelberg
  • eBook Packages Computer Science
  • Print ISBN 978-3-642-31493-3
  • Online ISBN 978-3-642-31494-0
  • Series Print ISSN 0302-9743
  • Series Online ISSN 1611-3349