Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation

20th International Workshop, PATMOS 2010, Grenoble, France, September 7-10, 2010, Revised Selected Papers

  • René van Leuken
  • Gilles Sicard
Conference proceedings PATMOS 2010

Part of the Lecture Notes in Computer Science book series (LNCS, volume 6448)

Table of contents

  1. Front Matter
  2. Session 1: Design Flows

    1. Tanguy Sassolas, Nicolas Ventroux, Nassima Boudouani, Guillaume Blanc
      Pages 1-10
    2. Christian Bachmann, Andreas Genser, Christian Steger, Reinhold Weiß, Josef Haid
      Pages 11-20
    3. Ioannis Kouretas, Vassilis Paliouras
      Pages 31-40
  3. Session 2: Circuit Techniques 1

    1. Abhishek Jain, Andrea Veggetti, Dennis Crippa, Pierluigi Rolandi
      Pages 41-50
    2. Dimitris Bekiaris, Antonis Papanikolaou, Christos Papameletis, Dimitrios Soudris, George Economakos, Kiamal Pekmestzi
      Pages 73-83
  4. Session 3: Low Power Circuits

    1. Cristiano Lazzari, Jorge Fernandes, Paulo Flores, José Monteiro
      Pages 84-93
    2. Pascal Vivet, Edith Beigne, Hugo Lebreton, Nacer-Eddine Zergainoh
      Pages 94-104
    3. Abdullah Baz, Delong Shang, Fei Xia, Alex Yakovlev
      Pages 105-115
    4. P. Carazo, R. Apolloni, F. Castro, D. Chaver, L. Pinuel, F. Tirado
      Pages 116-125
  5. Session 4: Self-Timed Circuits

    1. Mohsen Raji, Alireza Tajary, Behnam Ghavami, Hossein Pedram, Hamid R. Zarandi
      Pages 126-136
    2. Oussama Elissati, Eslam Yahya, Sébastien Rieubon, Laurent Fesquet
      Pages 137-149
    3. Julian Pontes, Matheus Moreira, Fernando Moraes, Ney Calazans
      Pages 150-159
  6. Session 5: Process Variation

    1. Bahman Kheradmand-Boroujeni, Christian Piguet, Yusuf Leblebici
      Pages 170-179
    2. Marco Lanuzza, Raffaele De Rose, Fabio Frustaci, Stefania Perri, Pasquale Corsonello
      Pages 180-189
    3. Qin Tang, Amir Zjajo, Michel Berkelaar, Nick van der Meijs
      Pages 190-199

About these proceedings


This book constitutes the refereed proceedings of the 20th International Conference on Integrated Circuit and System Design, PATMOS 2010, held in Grenoble, France, in September 2010. The 24 revised full papers presented and the 9 extended abstracts were carefully reviewed and are organized in topical sections on design flows; circuit techniques; low power circuits; self-timed circuits; process variation; high-level modeling of poweraware heterogeneous designs in SystemC-AMS; and minalogic.


integrated circuits low power architectures low power circuits manufacturability performance evalutation power consumption side-channel attacks simulation systems design systems modelling timing analysis

Editors and affiliations

  • René van Leuken
    • 1
  • Gilles Sicard
    • 2
  1. 1.EEMCS/MECE/CASDelft University of TechnologyDelftThe Netherlands
  2. 2.TIMA LaboratoryGrenobleFrance

Bibliographic information

  • DOI
  • Copyright Information Springer Berlin Heidelberg 2011
  • Publisher Name Springer, Berlin, Heidelberg
  • eBook Packages Computer Science
  • Print ISBN 978-3-642-17751-4
  • Online ISBN 978-3-642-17752-1
  • Series Print ISSN 0302-9743
  • Series Online ISSN 1611-3349
  • About this book