Post-Silicon Validation and Debug
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Table of contents
About this book
Introduction
This book provides a comprehensive coverage of System-on-Chip (SoC) post-silicon validation and debug challenges and state-of-the-art solutions with contributions from SoC designers, academic researchers as well as SoC verification experts. The readers will get a clear understanding of the existing debug infrastructure and how they can be effectively utilized to verify and debug SoCs.
- Provides a comprehensive overview of the SoC post-silicon validation and debug challenges;
- Covers state-of-the-art techniques for developing on-chip debug infrastructure;
- Describes automated techniques for generating post-silicon tests and assertions to enable effective post-silicon debug and coverage analysis;
- Covers scalable post-silicon validation and bug localization using a combination of simulation-based techniques and formal methods;
- Presents case studies for post-silicon debug of industrial SoC designs.
Keywords
Post-silicon and Runtime Verification Trace-based Post-Silicon Validation On-chip Instrumentation Test Reduction for Quick Error Detection Post-silicon Debug Software
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Bibliographic information
- DOI https://doi.org/10.1007/978-3-319-98116-1
- Copyright Information Springer Nature Switzerland AG 2019
- Publisher Name Springer, Cham
- eBook Packages Engineering
- Print ISBN 978-3-319-98115-4
- Online ISBN 978-3-319-98116-1
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