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Post-Silicon Validation and Debug

  • Prabhat Mishra
  • Farimah Farahmandi

Table of contents

  1. Front Matter
    Pages i-xv
  2. Introduction

    1. Front Matter
      Pages 1-1
    2. Farimah Farahmandi, Prabhat Mishra
      Pages 3-16
  3. Debug Infrastructure

    1. Front Matter
      Pages 17-17
    2. Debapriya Chatterjee, Valeria Bertacco
      Pages 57-75
    3. Azadeh Davoodi
      Pages 77-85
    4. Alif Ahmed, Kamran Rahmani, Prabhat Mishra
      Pages 87-107
  4. Generation of Tests and Assertions

    1. Front Matter
      Pages 109-109
    2. Farimah Farahmandi, Prabhat Mishra
      Pages 111-123
    3. Xiaobing Shi, Nicola Nicolici
      Pages 125-144
    4. Pouya Taatizadeh, Nicola Nicolici
      Pages 179-208
  5. Post-Silicon Debug

    1. Front Matter
      Pages 209-209
    2. Sandeep Chandran, Preeti Ranjan Panda
      Pages 211-229
    3. Masahiro Fujita, Qinhao Wang, Yusuke Kimura
      Pages 231-253
    4. Georg Weissenbacher, Sharad Malik
      Pages 255-273
    5. Farimah Farahmandi, Prabhat Mishra
      Pages 307-321
  6. Case Studies

    1. Front Matter
      Pages 323-323
    2. Subodha Charles, Prabhat Mishra
      Pages 325-342
    3. Tom Kolan, Hillel Mendelson, Amir Nahir, Vitali Sokhin
      Pages 343-363
  7. Conclusion and Future Directions

    1. Front Matter
      Pages 365-365
    2. Yangdi Lyu, Yuanwen Huang, Prabhat Mishra
      Pages 367-384
    3. Farimah Farahmandi, Prabhat Mishra
      Pages 385-390
  8. Back Matter
    Pages 391-394

About this book

Introduction

This book provides a comprehensive coverage of System-on-Chip (SoC) post-silicon validation and debug challenges and state-of-the-art solutions with contributions from SoC designers, academic researchers as well as SoC verification experts.  The readers will get a clear understanding of the existing debug infrastructure and how they can be effectively utilized to verify and debug SoCs. 

  • Provides a comprehensive overview of the SoC post-silicon validation and debug challenges;
  • Covers state-of-the-art techniques for developing on-chip debug infrastructure;
  • Describes automated techniques for generating post-silicon tests and assertions to enable effective post-silicon debug and coverage analysis;
  • Covers scalable post-silicon validation and bug localization using a combination of simulation-based techniques and formal methods;
  • Presents case studies for post-silicon debug of industrial SoC designs.

Keywords

Post-silicon and Runtime Verification Trace-based Post-Silicon Validation On-chip Instrumentation Test Reduction for Quick Error Detection Post-silicon Debug Software

Editors and affiliations

  • Prabhat Mishra
    • 1
  • Farimah Farahmandi
    • 2
  1. 1.Department of Computer and Information Science and EngineeringUniversity of FloridaGainesvilleUSA
  2. 2.Department of Computer and Information Science and EngineeringUniversity of FloridaGainesvilleUSA

Bibliographic information

  • DOI https://doi.org/10.1007/978-3-319-98116-1
  • Copyright Information Springer Nature Switzerland AG 2019
  • Publisher Name Springer, Cham
  • eBook Packages Engineering
  • Print ISBN 978-3-319-98115-4
  • Online ISBN 978-3-319-98116-1
  • Buy this book on publisher's site