From Variability Tolerance to Approximate Computing in Parallel Integrated Architectures and Accelerators

  • Abbas Rahimi
  • Luca Benini
  • Rajesh K. Gupta

Table of contents

  1. Front Matter
    Pages i-xv
  2. Abbas Rahimi, Luca Benini, Rajesh K. Gupta
    Pages 1-7
  3. Predicting and Preventing Errors

    1. Front Matter
      Pages 9-9
    2. Abbas Rahimi, Luca Benini, Rajesh K. Gupta
      Pages 11-19
    3. Abbas Rahimi, Luca Benini, Rajesh K. Gupta
      Pages 21-46
    4. Abbas Rahimi, Luca Benini, Rajesh K. Gupta
      Pages 47-60
    5. Abbas Rahimi, Luca Benini, Rajesh K. Gupta
      Pages 61-74
    6. Abbas Rahimi, Luca Benini, Rajesh K. Gupta
      Pages 75-88
  4. Detecting and Correcting Errors

    1. Front Matter
      Pages 89-90
    2. Abbas Rahimi, Luca Benini, Rajesh K. Gupta
      Pages 91-115
    3. Abbas Rahimi, Luca Benini, Rajesh K. Gupta
      Pages 117-130
  5. Accepting Errors

    1. Front Matter
      Pages 131-132
    2. Abbas Rahimi, Luca Benini, Rajesh K. Gupta
      Pages 133-149
    3. Abbas Rahimi, Luca Benini, Rajesh K. Gupta
      Pages 151-164
    4. Abbas Rahimi, Luca Benini, Rajesh K. Gupta
      Pages 165-179
    5. Abbas Rahimi, Luca Benini, Rajesh K. Gupta
      Pages 181-190
    6. Abbas Rahimi, Luca Benini, Rajesh K. Gupta
      Pages 191-193
  6. Back Matter
    Pages 195-197

About this book

Introduction

This book focuses on computing devices and their design at various levels to combat variability.  The authors provide a review of key concepts with particular emphasis on timing errors caused by various variability sources. They discuss methods to predict and prevent, detect and correct, and finally conditions under which such errors can be accepted; they also consider their implications on cost, performance and quality. Coverage includes a comparative evaluation of methods for deployment across various layers of the system from circuits, architecture, to application software. These can be combined in various ways to achieve specific goals related to observability and controllability of the variability effects, providing means to achieve cross layer or hybrid resilience.

  • ·         Covers challenges and opportunities in identifying microelectronic variability and the resulting errors at various layers in the system abstraction;
  • ·         Enables readers to assess how various levels of circuit and system design can mitigate the effects of variability;
  • ·         Demonstrates overall system architecture of what is now called “approximate computing” paradigm in massively parallel integrated architectures and accelerators.

Keywords

Analysis and Design of Resilient VLSI Circuits Variation-Tolerant Design in Nanometer Silicon Variation Tolerant VLSI Designs microelectronic variability combating variability

Authors and affiliations

  • Abbas Rahimi
    • 1
  • Luca Benini
    • 2
  • Rajesh K. Gupta
    • 3
  1. 1.Department of Electrical Engineering and Computer SciencesUniversity of California BerkeleyBerkeleyUSA
  2. 2.Integrated Systems LaboratoryETH ZurichZürichSwitzerland
  3. 3.Department of Computer Science and EngineeringUniversity of California, San DiegoLa JollaUSA

Bibliographic information

  • DOI https://doi.org/10.1007/978-3-319-53768-9
  • Copyright Information Springer International Publishing AG 2017
  • Publisher Name Springer, Cham
  • eBook Packages Engineering
  • Print ISBN 978-3-319-53767-2
  • Online ISBN 978-3-319-53768-9
  • About this book