New Data Structures and Algorithms for Logic Synthesis and Verification

  • Luca Gaetano Amaru

Table of contents

  1. Front Matter
    Pages i-xvi
  2. Luca Gaetano Amaru
    Pages 1-12
  3. Logic Representation, Manipulation and Optimization

    1. Front Matter
      Pages 13-13
    2. Luca Gaetano Amaru
      Pages 15-55
    3. Luca Gaetano Amaru
      Pages 57-102
  4. Logic Satisfiability and Equivalence Checking

    1. Front Matter
      Pages 103-103
    2. Luca Gaetano Amaru
      Pages 105-119
    3. Luca Gaetano Amaru
      Pages 151-153
  5. Back Matter
    Pages 155-156

About this book


This book introduces new logic primitives for electronic design automation tools. The author approaches fundamental EDA problems from a different, unconventional perspective, in order to demonstrate the key role of rethinking EDA solutions in overcoming technological limitations of present and future technologies. The author discusses techniques that improve the efficiency of logic representation, manipulation and optimization tasks by taking advantage of majority and biconditional logic primitives. Readers will be enabled to accelerate formal methods by studying core properties of logic circuits and developing new frameworks for logic reasoning engines.  

·         Provides a comprehensive, theoretical study on majority and biconditional logic for logic synthesis;

·         Updates the current scenario in synthesis and verification – especially in light of emerging technologies;

·         Demonstrates applications to CMOS technology and emerging technologies.


Logic Verification Logic Optimization Formal methods VLSI logic synthesis Digital logic synthesis Logic circuit synthesis

Authors and affiliations

  • Luca Gaetano Amaru
    • 1
  1. 1.Synopsys Inc. Santa ClaraUSA

Bibliographic information