Advertisement

Hybrid Fault Tolerance Techniques to Detect Transient Faults in Embedded Processors

  • José Rodrigo Azambuja
  • Fernanda Kastensmidt
  • Jürgen Becker

Table of contents

  1. Front Matter
    Pages i-xviii
  2. José Rodrigo Azambuja, Fernanda Kastensmidt, Jürgen Becker
    Pages 1-5
  3. José Rodrigo Azambuja, Fernanda Kastensmidt, Jürgen Becker
    Pages 7-18
  4. José Rodrigo Azambuja, Fernanda Kastensmidt, Jürgen Becker
    Pages 19-28
  5. José Rodrigo Azambuja, Fernanda Kastensmidt, Jürgen Becker
    Pages 29-61
  6. José Rodrigo Azambuja, Fernanda Kastensmidt, Jürgen Becker
    Pages 63-68
  7. José Rodrigo Azambuja, Fernanda Kastensmidt, Jürgen Becker
    Pages 69-74
  8. José Rodrigo Azambuja, Fernanda Kastensmidt, Jürgen Becker
    Pages 75-84
  9. José Rodrigo Azambuja, Fernanda Kastensmidt, Jürgen Becker
    Pages 85-87
  10. Back Matter
    Pages 89-94

About this book

Introduction

This book describes fault tolerance techniques based on software and hardware to create hybrid techniques. They are able to reduce overall performance degradation and increase error detection when associated with applications implemented in embedded processors. Coverage begins with an extensive discussion of the current state-of-the-art in fault tolerance techniques. The authors then discuss the best trade-off between software-based and hardware-based techniques and introduce novel hybrid techniques. Proposed techniques increase existing fault detection rates up to 100%, while maintaining low performance overheads in area and application execution time.

• Discusses the effects of radiation on modern integrated circuits;

• Provides a comprehensive overview of state-of-the art fault tolerance techniques based on software, hardware, and hybrid techniques;

• Introduces novel hybrid fault tolerance techniques for reconfigurable FPGAs and ASICs;

• Performs fault injection campaigns by simulation, bitstream fault injection, and radiation experiments;

• Enables readers to use techniques with lower performance degradation, area occupation, and memory usage.

Keywords

Fault Tolerance Fault Tolerance for ASICs Fault Tolerance for FPGAs Fault Tolerance in Embedded Processors Soft Errors Transient Errors

Authors and affiliations

  • José Rodrigo Azambuja
    • 1
  • Fernanda Kastensmidt
    • 2
  • Jürgen Becker
    • 3
  1. 1.Centro de Ciências ComputacionaisFederal University of Rio GrandeRio GrandeBrazil
  2. 2.Instituto de InformaticaFederal University of Rio Grande do SulPorto AlegreBrazil
  3. 3.Institut für Technik der InformationsverKarlsruhe Institute of TechnologyKarlsruheGermany

Bibliographic information

  • DOI https://doi.org/10.1007/978-3-319-06340-9
  • Copyright Information Springer International Publishing Switzerland 2014
  • Publisher Name Springer, Cham
  • eBook Packages Engineering
  • Print ISBN 978-3-319-06339-3
  • Online ISBN 978-3-319-06340-9
  • Buy this book on publisher's site