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Simulation of Semiconductor Processes and Devices 2007

SISPAD 2007

  • Conference proceedings
  • © 2007

Overview

Editors:
  1. Tibor Grasser

    1. Institut für Mikroelektronik, Technische Universität Wien, Vienna, Austria

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  2. Siegfried Selberherr

    1. Institut für Mikroelektronik, Technische Universität Wien, Vienna, Austria

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Table of contents (109 papers)

  1. Upcoming Challenges for Process Modeling

    • P. Pichler
    Pages 81-88

  2. Physics-Based Simulation of 1/f Noise in MOSFETs under Large-Signal Operation

    • Sung-Min Hong, Hong-Hyun Park, Chan Hyeong Park, Myoung Jin Lee, Hong Shick Min, Young June Park
    Pages 89-92

  3. Thin Body Effects to Suppress Random Dopant Fluctuations in Nano-Scaled MOSFETs

    • Y. Ashizawa, H. Oka
    Pages 93-96

  4. ‘Atomistic’ Mesh Generation for the Simulation of Semiconductor Devices

    • M. Aldegunde, A. J. García-Loureiro, P. V. Sushko, A. L. Shluger, K. Kalna, A. Asenov
    Pages 97-100

  5. Line Edge and Gate Interface Roughness Simulations of Advanced VLSI SOI-MOSFETs

    • T. Herrmann, W. Klix, R. Stenzel, S. Duenkel, R. Illgen, J. Hoentschel et al.
    Pages 101-104

  6. Impact of Shear Strain and Quantum Confinement on <110> Channel nMOSFET with High-Stress CESL

    • H. Takashino, T. Okagaki, T. Uchida, T. Hayashi, M. Tanizawa, E. Tsukuda et al.
    Pages 105-108

  7. Analysis of Novel Stress Enhancement Effect Based on Damascene Gate Process with eSiGe S/D for pFETs

    • S. Yamakawa, J. Wang, Y. Tateshita, K. Nagano, M. Tsukamoto, H. Ohri et al.
    Pages 109-112

  8. Nonlinear Piezoresistance Effect in Devices with Stressed Etch Stop Liner

    • K. H. Bach, R. Liebmann, M. Nawaz, C. Jungemann, E. Ungersboeck
    Pages 113-116

  9. 3D Stress, Process and Device Simulation: Extraction of the Relevant Stress Tensor

    • F. M. Bufler, L. Sponton, R. Gautschi
    Pages 117-120

  10. Impact of Two-Step Recessed SiGe S/D Engineering for Advanced pMOSFETs of 32 nm Technology Node and Beyond

    • N. Kusunoki, N. Yasutake, M. Awano, I. Mizushima, H. Yoshimura, S. Yamada et al.
    Pages 121-124

  11. Simulation Study of Multiple FIN FinFET Design for 32nm Technology Node and Beyond

    • Xinlin Wang, Andres Bryant, Omer Dokumaci, Phil Oldiges, Wilfried Haensch
    Pages 125-128

  12. Device Design and Scalability of an Impact Ionization MOS Transistor with an Elevated Impact Ionization Region

    • Eng-Huat Toh, Grace Huiqi Wang, Lap Chan, Ganesh Samudra, Yee-Chia Yeo
    Pages 129-132

  13. A Prototype Wafer Processing TCAD Tool Composed of BMD Simulation Module, Metal Gettering and Thermal Stress/Slip Functions for Scaled Device Design Phase

    • T. Okada, A. Fathurahman, R. Takeda, H. Banba, H. Kubota, Y. Matsushita et al.
    Pages 133-136

  14. Compact Modeling of Phase-Change Memories

    • K. Sonoda, A. Sakai, M. Moniwa, K. Ishikawa, O. Tsuchiya, Y. Inoue
    Pages 137-140

  15. Modeling of NBTI Degradation for SiON pMOSFET

    • J. Shimokawa, T. Enda, N. Aoki, H. Tanimoto, S. Ito, Y. Toyoshima
    Pages 141-144

  16. Modeling Study of Ultra-Thin Ge Layers Using Tight-Binding, LCBB and kp Methods

    • D. Rideau, E. Batail, S. Monfray, C. Tavernier, H. Jaouen
    Pages 145-148

  17. Analysis of Silicon Dioxide Interface Transition Region in MOS Structures

    • S. Markov, N. Barin, C. Fiegna, S. Roy, E. Sangiorgi, A. Asenov
    Pages 149-152

  18. Tunneling Properties of MOS Systems Based on High-k Oxides

    • F. Sacconi, A. Pecchia, M. Povolotskyi, A. Di Carlo, J. M. Jancu
    Pages 153-156

  19. First-Principles Investigation on Oxide Trapping

    • W. Gös, T. Grasser
    Pages 157-160

  20. A Self-Consistent Simulation of InSb Double-Gate MOSFETs Using Full-Band Tight-Binding Approach

    • Ximeng Guan, Yaohua Tan, Jing Lu, Lilin Tian, Yan Wang, Zhiping Yu
    Pages 161-164
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About this book

The "Twelfth International Conference on Simulation of Semiconductor Processes and Devices" (SISPAD 2007) continues a long series of conferences and is held in September 2007 at the TU Wien, Vienna, Austria. The conference is the leading forum for Technology Computer-Aided Design (TCAD) held alternatingly in the United States, Japan, and Europe. The first SISPAD conference took place in Tokyo in 1996 as the successor to three preceding conferences NUPAD, VPAD, and SISDEP. With its longstanding history SISPAD provides a world-wide forum for the presenta­ tion and discussion of outstanding recent advances and developments in the field of numerical process and device simulation. Driven by the ongoing miniaturization in semiconductor fabrication technology, the variety of topics discussed at this meeting reflects the ever-growing complexity of the subject. Apart from the classic topics like process, device, and interconnect simulation, mesh generation, a broad spec­ trum of numerical issues, and compact modeling, new simulation approaches like atomistic and first-principles methods have emerged as important fields of research and are currently making their way into standard TCAD suites.

Editors and Affiliations

  • Institut für Mikroelektronik, Technische Universität Wien, Vienna, Austria

    Tibor Grasser, Siegfried Selberherr

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