© 2019

Power Estimation on Electronic System Level using Linear Power Models


Table of contents

  1. Front Matter
    Pages i-xv
  2. Stefan Schuermans, Rainer Leupers
    Pages 1-16
  3. Stefan Schuermans, Rainer Leupers
    Pages 17-48
  4. Stefan Schuermans, Rainer Leupers
    Pages 49-70
  5. Stefan Schuermans, Rainer Leupers
    Pages 71-95
  6. Stefan Schuermans, Rainer Leupers
    Pages 97-140
  7. Stefan Schuermans, Rainer Leupers
    Pages 141-205
  8. Stefan Schuermans, Rainer Leupers
    Pages 207-211
  9. Back Matter
    Pages 213-336

About this book


This book describes a flexible and largely automated methodology for adding the estimation of power consumption to high level simulations at the electronic system level (ESL). This method enables the inclusion of power consumption considerations from the very start of a design. This ability can help designers of electronic systems to create devices with low power consumption.  The authors also demonstrate the implementation of the method, using the popular ESL language “SystemC”. This implementation enables most existing SystemC ESL simulations for power estimation with very little manual work. Extensive case-studies of a Network on Chip communication architecture and a dual-core application processor “ARM Cortex-A9” showcase the applicability and accuracy of the method to different types of electronic devices. The evaluation compares various trade-offs regarding amount of manual work, types of ESL models, achieved estimation accuracy and impact on the simulation speed.

  • Describes a flexible and largely automated ESL power estimation method;
  • Shows implementation of power estimation methodology in SystemC;
  • Uses two extensive case studies to demonstrate method introduced.


Performance Optimization under Power Constraints Flexible and Automated ESL Power Estimation Method Power Estimation for Network on Chip Power Estimation for ARM Cortex Network-on-Chip communication architecture

Authors and affiliations

  1. 1.Silexica GmbHKölnGermany
  2. 2.Institute for Communication Technologies and Embedded Systems (ICE)RWTH Aachen UniversityAachenGermany

About the authors

Stefan Schuermans started his computer science studies at RWTH Aachen University in 2000 and received his diploma degree with honors in 2005. Afterwards, he worked for secunet  Security Networks AG, Essen as a software developer. In 2008, he joined the Chair for Software for Systems on Silicon at RWTH Aachen University. His research activities comprised simulation and estimation of power consumption at Electronic System Level as well as exploration and programming of MPSoC architectures. He joined Silexica GmbH, Köln in 2016 and adopted the position as Chief Architect in the same year. In 2018, he received his Ph.D. (Dr.-Ing.) degree from the Faculty of Electrical Engineering and Information Technology of RWTH Aachen University.

Rainer Leupers received the M.Sc. (Dipl.-Inform.) and Ph.D. (Dr. rer. nat.) degrees in Computer Science with honors from TU Dortmund in 1992 and 1997. From 1997-2001 he was the chief engineer at the Embedded Systems chair at TU Dortmund. In 2002, he joined RWTH Aachen University as a professor for Software for Systems on Silicon. His research comprises software development tools, processor architectures, and system-level electronic design automation, with focus on application-specific multicore systems. He published numerous books and technical papers and served in committees of the leading international EDA conferences. He received various scientific awards, including Best Paper Awards at DAC and twice at DATE, as well as several industrial awards. Dr. Leupers is also engaged as an entrepreneur and in turning novel technologies into innovations. He holds several patents on system-on-chip design technologies and has been a co-founder of LISATek (now with Synopsys), Silexica, and Secure Elements. He has served as consultant for various companies, as an expert for the European Commission, and in the management boards of large-scale projects like HiPEAC and UMIC. He is the coordinator of EU projects TETRACOM and TETRAMAX on academia/industry technology transfer.

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