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The MIPS-X RISC Microprocessor

  • Paul Chow

Table of contents

  1. Front Matter
    Pages i-xxiv
  2. Paul Chow
    Pages 1-5
  3. Paul Chow
    Pages 7-19
  4. Paul Chow
    Pages 21-32
  5. Paul Chow
    Pages 33-48
  6. Paul Chow
    Pages 49-92
  7. Paul Chow
    Pages 93-160
  8. Paul Chow
    Pages 161-192
  9. Back Matter
    Pages 193-231

About this book

Introduction

The first Stanford MIPS project started as a special graduate course in 1981. That project produced working silicon in 1983 and a prototype for running small programs in early 1984. After that, we declared it a success and decided to move on to the next project-MIPS-X. This book is the final and complete word on MIPS-X. The initial design of MIPS-X was formulated in 1984 beginning in the Spring. At that time, we were unsure that RISe technology was going to have the industrial impact that we felt it should. We also knew of a number of architectural and implementation flaws in the Stanford MIPS machine. We believed that a new processor could achieve a performance level of over 10 times a VAX 11/780, and that a microprocessor of this performance level would convince academic skeptics of the value of the RISe approach. We were concerned that the flaws in the original RISe design might overshadow the core ideas, or that attempts to industrialize the technology would repeat the mistakes of the first generation designs. MIPS-X was targeted to eliminate the flaws in the first generation de­ signs and to boost the performance level by over a factor of five.

Keywords

Hardware design microprocessor processor

Editors and affiliations

  • Paul Chow
    • 1
  1. 1.University of TorontoCanada

Bibliographic information

  • DOI https://doi.org/10.1007/978-1-4757-6762-9
  • Copyright Information Springer-Verlag US 1989
  • Publisher Name Springer, Boston, MA
  • eBook Packages Springer Book Archive
  • Print ISBN 978-1-4419-5119-9
  • Online ISBN 978-1-4757-6762-9
  • Series Print ISSN 0893-3405
  • Buy this book on publisher's site