VHDL Answers to Frequently Asked Questions

  • Authors
  • Ben┬áCohen

Table of contents

  1. Front Matter
    Pages i-xxix
  2. Ben Cohen
    Pages 1-54
  3. Ben Cohen
    Pages 55-79
  4. Ben Cohen
    Pages 81-97
  5. Ben Cohen
    Pages 99-120
  6. Ben Cohen
    Pages 121-144
  7. Ben Cohen
    Pages 145-181
  8. Ben Cohen
    Pages 183-244
  9. Ben Cohen
    Pages 245-267
  10. Ben Cohen
    Pages 269-311
  11. Ben Cohen
    Pages 313-339
  12. Back Matter
    Pages 341-384

About this book

Introduction

VHDL Answers to Frequently asked Questions is a follow-up to the author's book VHDL Coding Styles and Methodologies (ISBN 0-7923-9598-0). On completion of his first book, the author continued teaching VHDL and actively participated in the comp. lang. vhdl newsgroup. During his experiences, he was enlightened by the many interesting issues and questions relating to VHDL and synthesis. These pertained to: misinterpretations in the use of the language; methods for writing error free, and simulation efficient, code for testbench designs and for synthesis; and general principles and guidelines for design verification. As a result of this wealth of public knowledge contributed by a large VHDL community, the author decided to act as a facilitator of this information by collecting different classes of VHDL issues, and by elaborating on these topics through complete simulatable examples. TItis book is intended for those who are seeking an enhanced proficiency in VHDL. Its target audience includes: 1. Engineers. The book addresses a set of problems commonly experienced by real users of VHDL. It provides practical explanations to the questions, and suggests practical solutions to the raised issues. It also includes packages of common utilities that are useful in the generation of debug code and testbench designs. These packages include conversions to strings (the IMAGE package), generation of Linear Feedback Shift Registers (LFSR), Multiple Input Shift Register (MISR), and random number generators.

Keywords

Hardwarebeschreibungssprache Signal VHDL integrated circuit material simulation verification

Bibliographic information

  • DOI https://doi.org/10.1007/978-1-4615-5641-1
  • Copyright Information Kluwer Academic Publishers 1998
  • Publisher Name Springer, Boston, MA
  • eBook Packages Springer Book Archive
  • Print ISBN 978-1-4613-7581-4
  • Online ISBN 978-1-4615-5641-1
  • About this book