Logic Synthesis for Low Power VLSI Designs

  • Sasan Iman
  • Massoud Pedram

Table of contents

  1. Front Matter
    Pages i-xv
  2. Background, Terminology and, Power Modeling

    1. Front Matter
      Pages 1-1
    2. Sasan Iman, Massoud Pedram
      Pages 3-19
    3. Sasan Iman, Massoud Pedram
      Pages 21-39
  3. Two-level Function Optimization for Low Power

    1. Front Matter
      Pages 41-41
    2. Sasan Iman, Massoud Pedram
      Pages 43-67
    3. Sasan Iman, Massoud Pedram
      Pages 69-84
  4. Multi-level Network Optimization for Low Power

    1. Front Matter
      Pages 85-85
    2. Sasan Iman, Massoud Pedram
      Pages 87-107
    3. Sasan Iman, Massoud Pedram
      Pages 109-148
    4. Sasan Iman, Massoud Pedram
      Pages 183-195
  5. Power Optimization Methodology

    1. Front Matter
      Pages 197-197
    2. Sasan Iman, Massoud Pedram
      Pages 199-224
  6. Conclusion

    1. Front Matter
      Pages 225-225
    2. Sasan Iman, Massoud Pedram
      Pages 227-232
  7. Back Matter
    Pages 233-236

About this book

Introduction

Logic Synthesis for Low Power VLSI Designs presents a systematic and comprehensive treatment of power modeling and optimization at the logic level. More precisely, this book provides a detailed presentation of methodologies, algorithms and CAD tools for power modeling, estimation and analysis, synthesis and optimization at the logic level. Logic Synthesis for Low Power VLSI Designs contains detailed descriptions of technology-dependent logic transformations and optimizations, technology decomposition and mapping, and post-mapping structural optimization techniques for low power. It also emphasizes the trade-off techniques for two-level and multi-level logic circuits that involve power dissipation and circuit speed, in the hope that the readers can better understand the issues and ways of achieving their power dissipation goal while meeting the timing constraints.
Logic Synthesis for Low Power VLSI Designs is written for VLSI design engineers, CAD professionals, and students who have had a basic knowledge of CMOS digital design and logic synthesis.

Keywords

CMOS VLSI algorithms circuit computer-aided design (CAD) digital design logic modeling network optimization

Authors and affiliations

  • Sasan Iman
    • 1
  • Massoud Pedram
    • 2
  1. 1.Escalade Co.University of Southern CaliforniaUSA
  2. 2.University of Southern CaliforniaUSA

Bibliographic information

  • DOI https://doi.org/10.1007/978-1-4615-5453-0
  • Copyright Information Kluwer Academic Publishers 1998
  • Publisher Name Springer, Boston, MA
  • eBook Packages Springer Book Archive
  • Print ISBN 978-1-4613-7490-9
  • Online ISBN 978-1-4615-5453-0
  • About this book