Timing Optimization Through Clock Skew Scheduling

  • Ivan S. Kourtev
  • Eby G. Friedman

Table of contents

  1. Front Matter
    Pages i-xxi
  2. Ivan S. Kourtev, Eby G. Friedman
    Pages 1-6
  3. Ivan S. Kourtev, Eby G. Friedman
    Pages 7-18
  4. Ivan S. Kourtev, Eby G. Friedman
    Pages 19-41
  5. Ivan S. Kourtev, Eby G. Friedman
    Pages 43-67
  6. Ivan S. Kourtev, Eby G. Friedman
    Pages 69-95
  7. Ivan S. Kourtev, Eby G. Friedman
    Pages 97-121
  8. Ivan S. Kourtev, Eby G. Friedman
    Pages 123-138
  9. Ivan S. Kourtev, Eby G. Friedman
    Pages 139-145
  10. Ivan S. Kourtev, Eby G. Friedman
    Pages 147-149
  11. Ivan S. Kourtev, Eby G. Friedman
    Pages 151-158
  12. Back Matter
    Pages 159-194

About this book

Introduction

History of the Book The last three decades have witnessed an explosive development in integrated circuit fabrication technologies. The complexities of cur­ rent CMOS circuits are reaching beyond the 100 nanometer feature size and multi-hundred million transistors per integrated circuit. To fully exploit this technological potential, circuit designers use sophisticated Computer-Aided Design (CAD) tools. While supporting the talents of innumerable microelectronics engineers, these CAD tools have become the enabling factor responsible for the successful design and implemen­ tation of thousands of high performance, large scale integrated circuits. This research monograph originated from a body of doctoral disserta­ tion research completed by the first author at the University of Rochester from 1994 to 1999 while under the supervision of Prof. Eby G. Friedman. This research focuses on issues in the design of the clock distribution net­ work in large scale, high performance digital synchronous circuits and particularly, on algorithms for non-zero clock skew scheduling. During the development of this research, it has become clear that incorporating timing issues into the successful integrated circuit design process is of fundamental importance, particularly in that advanced theoretical de­ velopments in this area have been slow to reach the designers' desktops.

Keywords

CMOS Potential Signal Technologie VLSI algorithms circuit computer computer-aided design (CAD) design development history integrated circuit optimization transistor

Authors and affiliations

  • Ivan S. Kourtev
    • 1
  • Eby G. Friedman
    • 2
  1. 1.University of PittsburghUSA
  2. 2.University of RochesterUSA

Bibliographic information

  • DOI https://doi.org/10.1007/978-1-4615-4411-1
  • Copyright Information Springer Science+Business Media New York 2000
  • Publisher Name Springer, Boston, MA
  • eBook Packages Springer Book Archive
  • Print ISBN 978-1-4613-6985-1
  • Online ISBN 978-1-4615-4411-1
  • About this book