Interconnect Technology and Design for Gigascale Integration

  • Jeff Davis
  • James D. Meindl

Table of contents

  1. Front Matter
    Pages i-xiii
  2. J. D. Meindl, J. A. Davis, P. Zarkesh-Ha, C. Patel, K. P. Martin, P. A. Kohl
    Pages 1-34
  3. Satya V. Nitta, Sampath Purushothaman, James G. Ryan, Daniel C. Edelstein, Panayotis Andricacos, Chao-Kun Hu et al.
    Pages 35-65
  4. J. Davis, A. Naeemi, J. Meindl
    Pages 111-157
  5. P. Zarkesh-Ha
    Pages 159-217
  6. J. Davis, R. Venkatesan, J. Meindl
    Pages 219-262
  7. S. M. Chai, D. Scott Wills
    Pages 263-292
  8. P. Kohl
    Pages 293-322
  9. S. J. Souri, T. Chiang, P. Kapur, K. Banerjee, K. C. Saraswat
    Pages 323-381
  10. L. C. Kimerling
    Pages 383-401
  11. Back Matter
    Pages 403-411

About this book


Interconnect Technology and Design for Gigascale Integration is the cumulative effort from academic researchers at Georgia Tech, MIT, and Stanford, as well as from industry researchers at IBM T.J. Watson Research Center, LSI Logic, and SUN microsystems. The material found in this book is unique in that it spans IC interconnect topics ranging from IBM's revolutionary copper process to an in depth exploration into interconnect-aware computer architectures. This broad swath of topics presented by leaders in the research field is intended to provide a comprehensive perspective on interconnect technology and design issues so that the reader will understand the implications of the semiconductor industry's next substantial milestone - gigascale integration.


LSI Transistor architecture complexity computer-aided design (CAD) integrated circuit modeling

Editors and affiliations

  • Jeff Davis
    • 1
  • James D. Meindl
    • 2
  1. 1.Georgia Institute of TechnologyUSA
  2. 2.Microelectronics Research CenterGeorgia Institute of TechnologyUSA

Bibliographic information