Turbo Decoder Architecture for Beyond-4G Applications

  • Cheng-Chi Wong
  • Hsie-Chia Chang

Table of contents

  1. Front Matter
    Pages i-viii
  2. Cheng-Chi Wong, Hsie-Chia Chang
    Pages 1-31
  3. Cheng-Chi Wong, Hsie-Chia Chang
    Pages 33-51
  4. Cheng-Chi Wong, Hsie-Chia Chang
    Pages 53-68
  5. Cheng-Chi Wong, Hsie-Chia Chang
    Pages 69-79
  6. Cheng-Chi Wong, Hsie-Chia Chang
    Pages 81-96
  7. Back Matter
    Pages 97-100

About this book


This book describes the most recent techniques for turbo decoder implementation, especially for 4G and beyond 4G applications.  The authors reveal techniques for the design of high-throughput decoders for future telecommunication systems, enabling designers to reduce hardware cost and shorten processing time.  Coverage includes an explanation of VLSI implementation of the turbo decoder, from basic functional units to advanced parallel architecture. Several state-of-the-art techniques that improve complexity and/or throughput are introduced.  The authors discuss both hardware architecture techniques and experimental results, showing the variations in area/throughput/performance with respect to several techniques. This book also illustrates turbo decoders for 3GPP-LTE/LTE-A and IEEE 802.16e/m standards, which provide a low-complexity but high-flexibility circuit structure to support these standards and enables designs that reconfigure block size and parallelism.  Case studies include the discussions of both throughput and performance of each mode (block size/parallelism/iteration).  This book not only highlights the critical design issues that restrict the speedup of parallel architecture, but it also provides the solutions to overcome these limitations by modifying slightly the turbo codec of modern standards.  


·         Offers readers a complete introduction to practical turbo decoder design;

·         Describes different design methodologies and explains the trade-offs between performance improvement and overhead;

·         Explains modern techniques for state-of-the-art designs;

·         Includes simulation and implementation results with respect to various decoder circuit designs;

·         Reveals novel approaches to higher operating efficiency of turbo decoders for beyond 4G applications.


3GPP-LTE 4G Beyond 4G IEEE 802.16e/m LTE-A Parallel Turbo Decoder Architecture Turbo Decoder Architecture Turbo Decoder Design VLSI Turbo Decoder Design

Authors and affiliations

  • Cheng-Chi Wong
    • 1
  • Hsie-Chia Chang
    • 2
  1. 1.Department of Electronics EngineeringNational Chiao-Tung UniversityHsinchuTaiwan
  2. 2.Department of Electronics EngineeringNational Chiao-Tung UniversityHsinchuTaiwan

Bibliographic information

  • DOI
  • Copyright Information Springer Science+Business Media New York 2014
  • Publisher Name Springer, New York, NY
  • eBook Packages Engineering
  • Print ISBN 978-1-4614-8309-0
  • Online ISBN 978-1-4614-8310-6
  • Buy this book on publisher's site