Robust SRAM Designs and Analysis

  • Jawar Singh
  • Saraju P. Mohanty
  • Dhiraj K. Pradhan

Table of contents

  1. Front Matter
    Pages i-xi
  2. Jawar Singh, Saraju P. Mohanty, Dhiraj K. Pradhan
    Pages 1-29
  3. Jawar Singh, Saraju P. Mohanty, Dhiraj K. Pradhan
    Pages 31-56
  4. Jawar Singh, Saraju P. Mohanty, Dhiraj K. Pradhan
    Pages 57-82
  5. Jawar Singh, Saraju P. Mohanty, Dhiraj K. Pradhan
    Pages 83-111
  6. Jawar Singh, Saraju P. Mohanty, Dhiraj K. Pradhan
    Pages 113-136
  7. Jawar Singh, Saraju P. Mohanty, Dhiraj K. Pradhan
    Pages 137-155
  8. Back Matter
    Pages 157-166

About this book

Introduction

This book provides a guide to Static Random Access Memory (SRAM) bitcell design and analysis to meet the nano-regime challenges for CMOS devices and emerging devices, such as Tunnel FETs. Since process variability is an ongoing challenge in large memory arrays, this book highlights the most popular SRAM bitcell topologies (benchmark circuits) that mitigate variability, along with exhaustive analysis. Experimental simulation setups are also included, which cover nano-regime challenges such as process variation, leakage and NBTI for SRAM design and analysis. Emphasis is placed throughout the book on the various trade-offs for achieving a best SRAM bitcell design.

  • Provides a complete and concise introduction to SRAM bitcell design and analysis;
  • Offers techniques to face nano-regime challenges such as process variation, leakage and NBTI for SRAM design and analysis;
  • Includes simulation set-ups for extracting different design metrics for CMOS technology and emerging devices;
  • Emphasizes different trade-offs for achieving the best possible SRAM bitcell design.

Keywords

Emerging memory Power-aware circuit design Power-aware memory design SRAM bitcell Static Random Access Memory System-on-Chip Tunnel FET Variation-tolerant memory design

Authors and affiliations

  • Jawar Singh
    • 1
  • Saraju P. Mohanty
    • 2
  • Dhiraj K. Pradhan
    • 3
  1. 1., Design & ManufacturingIndian Institute of Information TechnoloJabalpurIndia
  2. 2.University of North TexasDentonUSA
  3. 3., Merchant Venturers BuildingUniversity of BristolBristolUnited Kingdom

Bibliographic information

  • DOI https://doi.org/10.1007/978-1-4614-0818-5
  • Copyright Information Springer Science+Business Media New York 2013
  • Publisher Name Springer, New York, NY
  • eBook Packages Engineering
  • Print ISBN 978-1-4614-0817-8
  • Online ISBN 978-1-4614-0818-5
  • About this book