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© 2012

Introduction to Open Core Protocol

Fastpath to System-on-Chip Design

Book
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Table of contents

  1. Front Matter
    Pages i-xv
  2. W. David Schwaderer
    Pages 1-12
  3. W. David Schwaderer
    Pages 13-19
  4. W. David Schwaderer
    Pages 21-27
  5. W. David Schwaderer
    Pages 29-36
  6. W. David Schwaderer
    Pages 37-51
  7. W. David Schwaderer
    Pages 53-69
  8. W. David Schwaderer
    Pages 71-83
  9. W. David Schwaderer
    Pages 85-96
  10. W. David Schwaderer
    Pages 97-115
  11. W. David Schwaderer
    Pages 117-140
  12. W. David Schwaderer
    Pages 141-149
  13. W. David Schwaderer
    Pages 151-159
  14. Back Matter
    Pages 161-164

About this book

Introduction

This book introduces Open Core Protocol (OCP), not as a conventional hardware communications protocol but as a meta-protocol: a means for describing and capturing the communications requirements of an IP core, and mapping them to a specific set of signals with known semantics.  Readers will learn the capabilities of OCP as a semiconductor hardware interface specification that allows different System-On-Chip (SoC) cores to communicate.  The OCP methodology presented enables intellectual property designers to design core interfaces in standard ways. This facilitates reusing OCP-compliant cores across multiple SoC designs which, in turn, drastically reduces design times, support costs, and overall cost for electronics/SoCs.

  • Provides a comprehensive introduction to Open Core Protocol, which is more accessible than the full specification;
  • Designed as a hands-on, how-to guide to semiconductor design;
  • Includes numerous, real “usage examples” which are not available in the full specification;
  • Integrates coverage of design methodology discussing why cores are structured the way they are, whereas the official OCP specification only answers what the structure is.

Keywords

Integrated Circuits and Systems Intellectual Property Core Interface Interconnect Network on Chip On-Chip Communication Open Core Protocol System Level Design System Level Integration System-on-Chip Testbench Portability

Authors and affiliations

  1. 1.Symantec Technology NetworkSaratogaUSA

About the authors

W. David Schwaderer has a masters degree in Applied Mathematics from the California Institute of Technology and an MBA from the University of Southern California.  He has worked at IBM, EDS, Adaptec, Symantec, and Silicon Valley startups.  He has authored six commercial software programs for a variety of machine architectures using several different languages, dozens of articles, and ten technical books that explain complex technology in approachable ways. 

Whenever possible, David presents at Silicon Valley companies such as Intel, Google, Oracle Sun, and Symantec, as well as universities such as Stanford and MIT, immersing audiences in his favorite subject – innovation and its manifold surprises. His October 2007 MIT innovation lecture was selected as the best in the conference. He is a Silicon Valley consultant, presently assisting a global storage company to resolve storage device system development challenges.

Bibliographic information