Reduced Thermal Processing for ULSI

  • Roland A. Levy

Part of the NATO ASI Series book series (NSSB, volume 207)

Table of contents

  1. Front Matter
    Pages i-xi
  2. L. Van den hove, R. F. De Keersmaecker
    Pages 53-115
  3. C. Hill, S. Jones, D. Boys
    Pages 143-180
  4. Iain D. Calder
    Pages 181-226
  5. Gaetano Foti
    Pages 253-268
  6. J. M. Martínez-Duart, J. M. Albella
    Pages 269-294
  7. Terry O. Herndon
    Pages 295-353
  8. Back Matter
    Pages 431-438

About this book

Introduction

As feature dimensions of integrated circuits shrink, the associated geometrical constraints on junction depth impose severe restrictions on the thermal budget for processing such devices. Furthermore, due to the relatively low melting point of the first aluminum metallization level, such restrictions extend to the fabrication of multilevel structures that are now essential in increasing packing density of interconnect lines. The fabrication of ultra large scale integrated (ULSI) devices under thermal budget restrictions requires the reassessment of existing and the development of new microelectronic materials and processes. This book addresses three broad but interrelated areas. The first area focuses on the subject of rapid thermal processing (RTP), a technology that allows minimization of processing time while relaxing the constraints on high temperature. Initially developed to limit dopant redistribution, current applications of RTP are shown here to encompass annealing, oxidation, nitridation, silicidation, glass reflow, and contact sintering. In a second but complementary area, advances in equipment design and performance of rapid thermal processing equipment are presented in conjunction with associated issues of temperature measurement and control. Defect mechanisms are assessed together with the resulting properties of rapidly deposited and processed films. The concept of RTP integration for a full CMOS device process is also examined together with its impact on device characteristics.

Keywords

Doping defects dielectrics electronics epitaxy

Editors and affiliations

  • Roland A. Levy
    • 1
  1. 1.AT&T Bell LaboratoriesMurray HillUSA

Bibliographic information

  • DOI https://doi.org/10.1007/978-1-4613-0541-5
  • Copyright Information Springer-Verlag US 1989
  • Publisher Name Springer, Boston, MA
  • eBook Packages Springer Book Archive
  • Print ISBN 978-1-4612-7857-3
  • Online ISBN 978-1-4613-0541-5
  • Series Print ISSN 0258-1221
  • About this book