© 2011

CMOS High Efficiency On-chip Power Management


Part of the Analog Circuits and Signal Processing book series (ACSP)

Table of contents

  1. Front Matter
    Pages i-xii
  2. Green Electronics and Power Management

    1. Front Matter
      Pages 1-1
    2. John Hu, Mohammed Ismail
      Pages 3-17
    3. John Hu, Mohammed Ismail
      Pages 19-32
  3. Power Management IC Design

    1. Front Matter
      Pages 33-33
    2. John Hu, Mohammed Ismail
      Pages 35-87
    3. John Hu, Mohammed Ismail
      Pages 89-115
    4. John Hu, Mohammed Ismail
      Pages 117-118
  4. Back Matter
    Pages 119-120

About this book


This book deals with the subject matter of power management integrated circuit (IC) design, or integrated power electronics, as a response to the growing need for energy-efficient electronics. The authors introduce various power management IC design techniques to build future energy-efficient “green” electronics. The goal is to achieve high efficiency, which is essential to meet consumers’ growing need for longer battery lives.  The focus is to study topologies amiable for full on-chip implementation (few external components) in the mainstream CMOS technology, which will reduce the physical size and the manufacturing cost of the devices.

  • Describes a number of  techniques at circuits and systems level that increase sleep-mode efficiency to prolong the battery life, without sacrificing performance parameters;
  • Enables readers to design for compactness, which requires fewer bulky external components and circuit topologies that lend themselves easily to full on-chip integration;
  • Offers insights on how the efficiency boosting techniques for power management IC designs work toward society’s quest for higher energy efficiency.



Analog Circuits and Signal Processing CMOS power management Green integrated circuits Long-sleep model power management Low Power Integrated Circuits Nanometer CMOS power management On-chip power management Power integrated circuit Power management integrated circuit Sleep-mode power reduction

Authors and affiliations

  1. 1.The Ohio State UniversityColumbusUSA
  2. 2., Dpt. of Electrical & Computer EngineerinThe Ohio State UniversityColumbusUSA

Bibliographic information