Multiprocessor System-on-Chip

Hardware Design and Tool Integration

  • Michael Hübner
  • Jürgen Becker

Table of contents

  1. Front Matter
    Pages i-viii
  2. Lionel Torres, Pascal Benoit, Gilles Sassatelli, Michel Robert, Fabien Clermidy, Diego Puschini
    Pages 1-21
  3. “Application Mapping and Communication Infrastructure”

    1. Front Matter
      Pages 23-23
    2. Benny Akesson, Anca Molnos, Andreas Hansson, Jude Ambrose Angelo, Kees Goossens
      Pages 25-56
    3. A. Herkersdorf, A. Lankes, M. Meitinger, R. Ohlendorf, S. Wallentowitz, T. Wild et al.
      Pages 57-87
    4. Michael Anderson, Bryan Catanzaro, Jike Chong, Ekaterina Gonina, Kurt Keutzer, Chao-Yue Lai et al.
      Pages 89-113
    5. Rakesh Kumar, Timothy G. Mattson, Gilles Pokam, Rob Van Der Wijngaart
      Pages 115-123
  4. “Reconfigurable Hardware in Multiprocessor Systems”

    1. Front Matter
      Pages 125-125
  5. “Physical Design of Multiprocessor Systems”

    1. Front Matter
      Pages 153-153
    2. Miltos D. Grammatikakis, George Kornaros, Marcello Coppola
      Pages 167-193
  6. Trends and Challenges for Multiprocessor Systems

    1. Front Matter
      Pages 195-195
    2. Dac Pham, Jim Holt, Sanjay Deshpande
      Pages 197-222
    3. Jürgen Teich, Jörg Henkel, Andreas Herkersdorf, Doris Schmitt-Landsiedel, Wolfgang Schröder-Preikschat, Gregor Snelting
      Pages 241-268
  7. Back Matter
    Pages 269-270

About this book

Introduction

Improving future electronic system performance can only be achieved by exploiting parallelism on all system levels. Multicore architectures offer a better performance/Watt ratio than single core architectures with similar performance. Combining multicore and coprocessor technology promises extreme computing power for highly CPU-time-consuming applications. FPGA-based accelerators not only offer the opportunity to speed up an application by implementing their compute-intensive kernels into hardware, but also to adapt to the dynamical behavior of an application. This book describes strategies for future system design in multiprocessor system-on-chip (MPSoC) architectures. Both hardware design and integration of new development tools are discussed. Novel trends in MPSoC design, combined with reconfigurable architectures are a main topic of concern. The main emphasis is on architectures, design-flow, tool-development, applications and system design. This book deals with key issues such as on-chip communication architectures, integration of reconfigurable hardware, and physical design of multiprocessor systems. •Provides a state-of-the-art overview of system design using MPSoC architectures; •Describes current trends in on-chip communication architectures; •Offers extensive coverage of system design integrating MPSoC architectures with reconfigurable hardware; •Includes coverage of challenges in physical design for multi- and manycore hardware architectures.

Keywords

Circuit Design Embedded Systems FPGA MPSoC Manycore Multicore Multiprocessor-System-on-Chip NOC Network on Chip On-Chip Communication architectures Parallelism Reconfigurable Hardware System-on-Chip

Editors and affiliations

  • Michael Hübner
    • 1
  • Jürgen Becker
    • 2
  1. 1.Fak. Elektrotechnik, Inst. Technik derUniversität KarlsruheKarlsruheGermany
  2. 2.Institut für Technik der, InformationsverarbeitungKarlsruhe Institute of Technology (KIT)KarlsruheGermany

Bibliographic information

  • DOI https://doi.org/10.1007/978-1-4419-6460-1
  • Copyright Information Springer Science+Business Media, LLC 2011
  • Publisher Name Springer, New York, NY
  • eBook Packages Engineering
  • Print ISBN 978-1-4419-6459-5
  • Online ISBN 978-1-4419-6460-1
  • About this book