Power-Aware Testing and Test Strategies for Low Power Devices

  • Patrick Girard
  • Nicola Nicolici
  • Xiaoqing Wen

Table of contents

  1. Front Matter
    Pages i-xxiii
  2. Laung-Terng Wang, Charles E. Stroud
    Pages 1-29
  3. Sandip Kundu, Alodeep Sanyal
    Pages 31-63
  4. Xiaoqing Wen, Seongmoon Wang
    Pages 65-115
  5. Hans-Joachim Wunderlich, Christian G. Zoellin
    Pages 117-146
  6. Sandeep Kumar Goel, Krishnendu Chakrabarty
    Pages 147-173
  7. Erik Larsson, C. P. Ravikumar
    Pages 175-211
  8. Kaushik Roy, Swarup Bhunia
    Pages 213-242
  9. Saqib Khursheed, Bashir M. Al-Hashimi
    Pages 243-271
  10. Brion Keller, Krishna Chakravadhanula
    Pages 273-293
  11. Mark Kassab, Mohammad Tehranipoor
    Pages 295-322
  12. Mokhtar Hirech
    Pages 323-353
  13. Back Matter
    Pages 355-363

About this book

Introduction

Power-Aware Testing and Test Strategies for Low-Power Devices

Edited by:

Patrick Girard, Research Director, CNRS / LIRMM, France

Nicola Nicolici, Associate Professor, McMaster University, Canada

Xiaoqing Wen, Professor, Kyushu Institute of Technology, Japan

Managing the power consumption of circuits and systems is now considered as one of the most important challenges for the semiconductor industry. Elaborate power management strategies, such as voltage scaling, clock gating or power gating techniques, are used today to control the power dissipation during functional operation. The usage of these strategies has various implications on manufacturing test, and power-aware test is therefore increasingly becoming a major consideration during design-for-test and test preparation for low-power devices. This book explores existing solutions for power-aware test and design-for-test of conventional circuits and systems, and surveys test strategies and Electronic Design Automation (EDA) solutions for testing low-power devices.

  1. The first comprehensive book on power-aware test for (low-power) circuits and systems
  2. Shows readers how low-power devices can be tested safely without affecting yield and reliability
  3. Includes necessary background information on design-for-test and low-power design
  4. Covers in detail power-constrained test techniques, including power-aware automatic test pattern generation, design-for-test, built-in self-test and test compression
  5. Presents state-of-the-art industrial practices and EDA solutions

Keywords

Electronic Testing Low Power Design Low Power Testing Nanoscale Testing Nicolici Power Aware Testing Semiconductor Testing VLSI Wen power management semiconductor testing

Editors and affiliations

  • Patrick Girard
    • 1
  • Nicola Nicolici
    • 2
  • Xiaoqing Wen
    • 3
  1. 1.de Robotique de Microélectronique deLIRMM - Laboratoire d'InformatiqueMontpellierFrance
  2. 2.Dept. Electrical &McMaster UniversityHamiltonCanada
  3. 3.Dept. Computer Science & ElectronicsKyushu Institute of TechnologyIizukaJapan

Bibliographic information

  • DOI https://doi.org/10.1007/978-1-4419-0928-2
  • Copyright Information Springer-Verlag US 2010
  • Publisher Name Springer, Boston, MA
  • eBook Packages Engineering
  • Print ISBN 978-1-4419-0927-5
  • Online ISBN 978-1-4419-0928-2
  • About this book